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Subject: Re: [PATCH v8 04/16] clk: npcm8xx: add clock controller
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Arnd Bergmann <arnd@arndb.de>,
        Avi Fishman <avifishman70@gmail.com>,
        Benjamin Fair <benjaminfair@google.com>,
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To:     Tomer Maimon <tmaimon77@gmail.com>
Date:   Fri, 29 Jul 2022 15:56:01 -0700
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Quoting Tomer Maimon (2022-07-24 02:06:54)
> On Sat, 23 Jul 2022 at 06:02, Stephen Boyd <sboyd@kernel.org> wrote:
> > Furthermore, in DT, reg properties aren't supposed to overlap. When that
> > happens it usually indicates the DT is being written to describe driver
> > structure instead of the IP blocks that are delivered by the hardware
> > engineer. In this case it sounds like a combined clk and reset IP block
> > because they piled all the SoC glue stuff into a register range. Are
> > there more features in this IO range?
>=20
> No, this range only combined the reset and clock together, but it
> combined in a way that we cannot split it to two or even three
> different registers...

Because it is jumbled in some range?

>=20
> I do see a way to combine the clock and the reset driver, the NPCM
> reset driver is serving other NPCM BMC's.
> Should we use regmap to handle the clock registers instead of ioremap?

Sure? Using regmap or not looks like a parallel discussion. How does it
help use platform APIs?