From: Jagan Teki <jagan@edgeble.ai>
To: Heiko Stuebner <heiko@sntech.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Kever Yang <kever.yang@rock-chips.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
Jagan Teki <jagan@edgeble.ai>
Subject: [PATCH v2 00/20] ARM: Add Rockchip RV1126 support
Date: Sun, 31 Jul 2022 23:17:06 +0530 [thread overview]
Message-ID: <20220731174726.72631-1-jagan@edgeble.ai> (raw)
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.
It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.
This patch series add basic core support for Rockchip RV1126 and
v1 for the series can be found at [2].
Tested in Edgeble AI Edge Compute Module 0.
Anyone interested, please have a look on this repo [1]
[2] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220723204335.750095-1-jagan@edgeble.ai/
[1] https://github.com/edgeble/linux-next/commits/ecm0-v4
Any inputs?
Jagan.
Elaine Zhang (1):
clk: rockchip: Add MUXTBL variant
Jagan Teki (18):
dt-bindings: power: rockchip: Document RV1126 power-controller
dt-bindings: power: Add power-domain header for RV1126
soc: rockchip: power-domain: Add RV1126 power domains
dt-bindings: power: rockchip: Document RV1126 PMU IO domains
dt-bindings: pinctrl: rockchip: Document RV1126 pinctrl
pinctrl: rockchip: Add RV1126 pinctrl support
dt-bindings: clock: rockchip: Document RV1126 CRU
clk: rockchip: Add dt-binding header for RV1126
Add clock controller support for RV1126 SoC.
dt-bindings: soc: rockchip: Document RV1126 grf
dt-bindings: soc: rockchip: Document RV1126 pmugrf
dt-bindings: mfd: syscon: Add Rockchip RV1126 QoS register
ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
ARM: dts: rockchip: Add Rockchip RV1126 SoC
dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd.
dt-bindings: arm: rockchip: Add Edgeble AI Edge Compute Module 0 Carrier
ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0
ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier
Jianqun Xu (1):
soc: rockchip: io-domain: Add RV1126 IO domains
.../devicetree/bindings/arm/rockchip.yaml | 6 +
.../bindings/clock/rockchip,rv1126-cru.yaml | 62 +
.../devicetree/bindings/mfd/syscon.yaml | 1 +
.../bindings/pinctrl/rockchip,pinctrl.yaml | 1 +
.../power/rockchip,power-controller.yaml | 2 +
.../bindings/power/rockchip-io-domain.yaml | 30 +
.../devicetree/bindings/soc/rockchip/grf.yaml | 2 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
MAINTAINERS | 2 +-
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/rv1126-edgeble-ecm0-carrier.dts | 38 +
.../rv1126-edgeble-edge-compute-module-0.dtsi | 353 ++++++
arch/arm/boot/dts/rv1126-pinctrl.dtsi | 302 +++++
arch/arm/boot/dts/rv1126.dtsi | 500 ++++++++
drivers/clk/rockchip/Kconfig | 7 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk-rv1126.c | 1107 +++++++++++++++++
drivers/clk/rockchip/clk.c | 27 +-
drivers/clk/rockchip/clk.h | 36 +
drivers/pinctrl/pinctrl-rockchip.c | 333 ++++-
drivers/pinctrl/pinctrl-rockchip.h | 1 +
drivers/soc/rockchip/io-domain.c | 20 +
drivers/soc/rockchip/pm_domains.c | 29 +
include/dt-bindings/clock/rv1126-cru.h | 632 ++++++++++
include/dt-bindings/power/rv1126-power.h | 35 +
25 files changed, 3516 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml
create mode 100644 arch/arm/boot/dts/rv1126-edgeble-ecm0-carrier.dts
create mode 100644 arch/arm/boot/dts/rv1126-edgeble-edge-compute-module-0.dtsi
create mode 100644 arch/arm/boot/dts/rv1126-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/rv1126.dtsi
create mode 100644 drivers/clk/rockchip/clk-rv1126.c
create mode 100644 include/dt-bindings/clock/rv1126-cru.h
create mode 100644 include/dt-bindings/power/rv1126-power.h
--
2.25.1
next reply other threads:[~2022-07-31 17:47 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-31 17:47 Jagan Teki [this message]
2022-07-31 17:47 ` [PATCH v2 01/20] dt-bindings: power: rockchip: Document RV1126 power-controller Jagan Teki
2022-07-31 17:47 ` [PATCH v2 02/20] dt-bindings: power: Add power-domain header for RV1126 Jagan Teki
2022-08-02 10:38 ` Krzysztof Kozlowski
2022-08-03 10:24 ` Jagan Teki
2022-08-03 10:42 ` Krzysztof Kozlowski
2022-08-03 10:46 ` Jagan Teki
2022-08-03 11:27 ` Krzysztof Kozlowski
2022-08-03 11:30 ` Jagan Teki
2022-08-03 11:39 ` Krzysztof Kozlowski
2022-08-03 11:51 ` Jagan Teki
2022-08-03 22:33 ` Rob Herring
2022-08-04 18:26 ` Jagan Teki
2022-07-31 17:47 ` [PATCH v2 03/20] soc: rockchip: power-domain: Add RV1126 power domains Jagan Teki
2022-07-31 17:47 ` [PATCH v2 04/20] dt-bindings: power: rockchip: Document RV1126 PMU IO domains Jagan Teki
2022-07-31 17:47 ` [PATCH v2 05/20] soc: rockchip: io-domain: Add RV1126 " Jagan Teki
2022-07-31 17:47 ` [PATCH v2 06/20] dt-bindings: pinctrl: rockchip: Document RV1126 pinctrl Jagan Teki
2022-07-31 17:47 ` [PATCH v2 07/20] pinctrl: rockchip: Add RV1126 pinctrl support Jagan Teki
2022-07-31 17:47 ` [PATCH v2 08/20] clk: rockchip: Add MUXTBL variant Jagan Teki
2022-07-31 17:47 ` [PATCH v2 09/20] dt-bindings: clock: rockchip: Document RV1126 CRU Jagan Teki
2022-07-31 17:47 ` [PATCH v2 10/20] clk: rockchip: Add dt-binding header for RV1126 Jagan Teki
2022-07-31 17:47 ` [PATCH v2 11/20] Add clock controller support for RV1126 SoC Jagan Teki
2022-07-31 17:47 ` [PATCH v2 12/20] dt-bindings: soc: rockchip: Document RV1126 grf Jagan Teki
2022-07-31 17:47 ` [PATCH v2 13/20] dt-bindings: soc: rockchip: Document RV1126 pmugrf Jagan Teki
2022-07-31 17:47 ` [PATCH v2 14/20] dt-bindings: mfd: syscon: Add Rockchip RV1126 QoS register Jagan Teki
2022-07-31 17:47 ` [PATCH v2 15/20] ARM: dts: rockchip: Add Rockchip RV1126 pinctrl Jagan Teki
2022-07-31 17:47 ` [PATCH v2 16/20] ARM: dts: rockchip: Add Rockchip RV1126 SoC Jagan Teki
2022-07-31 17:47 ` [PATCH v2 17/20] dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd Jagan Teki
2022-07-31 17:47 ` [PATCH v2 18/20] dt-bindings: arm: rockchip: Add Edgeble AI Edge Compute Module 0 Carrier Jagan Teki
2022-07-31 17:47 ` [PATCH v2 19/20] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Jagan Teki
2022-07-31 17:47 ` [PATCH v2 20/20] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220731174726.72631-1-jagan@edgeble.ai \
--to=jagan@edgeble.ai \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=kever.yang@rock-chips.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).