devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: "Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
	"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
	"Frank Li" <Frank.Li@nxp.com>, "Rob Herring" <robh+dt@kernel.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND v4 09/15] PCI: dwc: Drop inbound iATU types enumeration - dw_pcie_as_type
Date: Mon, 1 Aug 2022 19:06:41 +0530	[thread overview]
Message-ID: <20220801133641.GI93763@thinkpad> (raw)
In-Reply-To: <20220624143947.8991-10-Sergey.Semin@baikalelectronics.ru>

On Fri, Jun 24, 2022 at 05:39:41PM +0300, Serge Semin wrote:
> There is no point in having an enumeration declared in the driver for the
> PCIe end-point. First of all it's redundant since the driver already has a
> set of macro declared which describe the available in/out iATU types, thus
> having an addition abstraction just needlessly complicates the code.
> Secondly checking the passed iATU type for validity within a single driver
> is pointless since the driver is supposed to be consistent by its nature.
> Finally the outbound iATU type isn't encoded by the denoted enumeration,
> thus giving a false impression that the in and out iATU types are
> unrelated while they are the same. So to speak let's drop the redundant
> dw_pcie_as_type enumeration replacing it with the direct iATU type usage.
> 
> While at it, since we are touching the iATU inbound regions config methods
> anyway, let's fix the arguments order so the type would be followed by the
> address-related parameters. Thus the inbound and outbound iATU setup
> methods will look alike. That shall improve the code readability a bit.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Thanks,
Mani

> ---
>  .../pci/controller/dwc/pcie-designware-ep.c   | 21 +++++------
>  drivers/pci/controller/dwc/pcie-designware.c  | 35 +++----------------
>  drivers/pci/controller/dwc/pcie-designware.h  |  9 +----
>  3 files changed, 15 insertions(+), 50 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index ffbd3af6d65a..5a158813f687 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -154,9 +154,8 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>  	return 0;
>  }
>  
> -static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no,
> -				  enum pci_barno bar, dma_addr_t cpu_addr,
> -				  enum dw_pcie_as_type as_type)
> +static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type,
> +				  dma_addr_t cpu_addr, enum pci_barno bar)
>  {
>  	int ret;
>  	u32 free_win;
> @@ -168,8 +167,8 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no,
>  		return -EINVAL;
>  	}
>  
> -	ret = dw_pcie_prog_inbound_atu(pci, func_no, free_win, bar, cpu_addr,
> -				       as_type);
> +	ret = dw_pcie_prog_inbound_atu(pci, func_no, free_win, type,
> +				       cpu_addr, bar);
>  	if (ret < 0) {
>  		dev_err(pci->dev, "Failed to program IB window\n");
>  		return ret;
> @@ -221,27 +220,25 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>  static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>  			      struct pci_epf_bar *epf_bar)
>  {
> -	int ret;
>  	struct dw_pcie_ep *ep = epc_get_drvdata(epc);
>  	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
>  	enum pci_barno bar = epf_bar->barno;
>  	size_t size = epf_bar->size;
>  	int flags = epf_bar->flags;
> -	enum dw_pcie_as_type as_type;
> -	u32 reg;
>  	unsigned int func_offset = 0;
> +	int ret, type;
> +	u32 reg;
>  
>  	func_offset = dw_pcie_ep_func_select(ep, func_no);
>  
>  	reg = PCI_BASE_ADDRESS_0 + (4 * bar) + func_offset;
>  
>  	if (!(flags & PCI_BASE_ADDRESS_SPACE))
> -		as_type = DW_PCIE_AS_MEM;
> +		type = PCIE_ATU_TYPE_MEM;
>  	else
> -		as_type = DW_PCIE_AS_IO;
> +		type = PCIE_ATU_TYPE_IO;
>  
> -	ret = dw_pcie_ep_inbound_atu(ep, func_no, bar,
> -				     epf_bar->phys_addr, as_type);
> +	ret = dw_pcie_ep_inbound_atu(ep, func_no, type, epf_bar->phys_addr, bar);
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index bd575ad32bc4..330575182712 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -421,10 +421,9 @@ static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg,
>  }
>  
>  static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, u8 func_no,
> -					   int index, int bar, u64 cpu_addr,
> -					   enum dw_pcie_as_type as_type)
> +					   int index, int type,
> +					   u64 cpu_addr, u8 bar)
>  {
> -	int type;
>  	u32 retries, val;
>  
>  	dw_pcie_writel_ib_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
> @@ -432,17 +431,6 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, u8 func_no,
>  	dw_pcie_writel_ib_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
>  				 upper_32_bits(cpu_addr));
>  
> -	switch (as_type) {
> -	case DW_PCIE_AS_MEM:
> -		type = PCIE_ATU_TYPE_MEM;
> -		break;
> -	case DW_PCIE_AS_IO:
> -		type = PCIE_ATU_TYPE_IO;
> -		break;
> -	default:
> -		return -EINVAL;
> -	}
> -
>  	dw_pcie_writel_ib_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, type |
>  				 PCIE_ATU_FUNC_NUM(func_no));
>  	dw_pcie_writel_ib_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
> @@ -468,32 +456,19 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, u8 func_no,
>  }
>  
>  int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> -			     int bar, u64 cpu_addr,
> -			     enum dw_pcie_as_type as_type)
> +			     int type, u64 cpu_addr, u8 bar)
>  {
> -	int type;
>  	u32 retries, val;
>  
>  	if (pci->iatu_unroll_enabled)
> -		return dw_pcie_prog_inbound_atu_unroll(pci, func_no, index, bar,
> -						       cpu_addr, as_type);
> +		return dw_pcie_prog_inbound_atu_unroll(pci, func_no, index, type,
> +						       cpu_addr, bar);
>  
>  	dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT, PCIE_ATU_REGION_INBOUND |
>  			   index);
>  	dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET, lower_32_bits(cpu_addr));
>  	dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_TARGET, upper_32_bits(cpu_addr));
>  
> -	switch (as_type) {
> -	case DW_PCIE_AS_MEM:
> -		type = PCIE_ATU_TYPE_MEM;
> -		break;
> -	case DW_PCIE_AS_IO:
> -		type = PCIE_ATU_TYPE_IO;
> -		break;
> -	default:
> -		return -EINVAL;
> -	}
> -
>  	dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, type |
>  			   PCIE_ATU_FUNC_NUM(func_no));
>  	dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE |
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 7f1c00fa084d..c63ace3c3f25 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -228,12 +228,6 @@ struct dw_pcie_rp {
>  	DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
>  };
>  
> -enum dw_pcie_as_type {
> -	DW_PCIE_AS_UNKNOWN,
> -	DW_PCIE_AS_MEM,
> -	DW_PCIE_AS_IO,
> -};
> -
>  struct dw_pcie_ep_ops {
>  	void	(*ep_init)(struct dw_pcie_ep *ep);
>  	int	(*raise_irq)(struct dw_pcie_ep *ep, u8 func_no,
> @@ -331,8 +325,7 @@ void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
>  				  int type, u64 cpu_addr, u64 pci_addr,
>  				  u64 size);
>  int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> -			     int bar, u64 cpu_addr,
> -			     enum dw_pcie_as_type as_type);
> +			     int type, u64 cpu_addr, u8 bar);
>  void dw_pcie_disable_atu(struct dw_pcie *pci, int index,
>  			 enum dw_pcie_region_type type);
>  void dw_pcie_setup(struct dw_pcie *pci);
> -- 
> 2.35.1
> 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2022-08-01 13:36 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-24 14:39 [PATCH RESEND v4 00/15] PCI: dwc: Add hw version and dma-ranges support Serge Semin
2022-06-24 14:39 ` [PATCH RESEND v4 01/15] PCI: dwc: Add more verbose link-up message Serge Semin
2022-08-01 12:59   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 02/15] PCI: dwc: Detect iATU settings after getting "addr_space" resource Serge Semin
2022-07-28 14:38   ` Bjorn Helgaas
2022-08-01 13:01   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 03/15] PCI: dwc: Convert to using native IP-core versions representation Serge Semin
2022-07-28 15:24   ` Bjorn Helgaas
2022-07-28 15:31     ` Ben Dooks
2022-07-28 16:34       ` Bjorn Helgaas
2022-07-28 18:53     ` Serge Semin
2022-08-01 13:07   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 04/15] PCI: dwc: Add IP-core version detection procedure Serge Semin
2022-08-01 13:12   ` Manivannan Sadhasivam
2022-08-01 20:06     ` Bjorn Helgaas
2022-08-02  7:31       ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 05/15] PCI: dwc: Introduce Synopsys IP-core versions/types interface Serge Semin
2022-08-01 13:21   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 06/15] PCI: intel-gw: Drop manual DW PCIe controller version setup Serge Semin
2022-08-01 13:28   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 07/15] PCI: tegra194: " Serge Semin
2022-06-27  7:59   ` Vidya Sagar
2022-06-27 22:31     ` Serge Semin
2022-08-01 13:29   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 08/15] PCI: dwc: Add host de-initialization callback Serge Semin
2022-08-01 13:33   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 09/15] PCI: dwc: Drop inbound iATU types enumeration - dw_pcie_as_type Serge Semin
2022-08-01 13:36   ` Manivannan Sadhasivam [this message]
2022-06-24 14:39 ` [PATCH RESEND v4 10/15] PCI: dwc: Drop iATU regions enumeration - dw_pcie_region_type Serge Semin
2022-08-01 13:37   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 11/15] PCI: dwc: Simplify in/outbound iATU setup methods Serge Semin
2022-08-01 13:50   ` Manivannan Sadhasivam
2022-08-01 20:11     ` Bjorn Helgaas
2022-06-24 14:39 ` [PATCH RESEND v4 12/15] PCI: dwc: Add iATU regions size detection procedure Serge Semin
2022-08-01 13:52   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 13/15] PCI: dwc: Verify in/out regions against iATU constraints Serge Semin
2022-08-01 13:53   ` Manivannan Sadhasivam
2022-06-24 14:39 ` [PATCH RESEND v4 14/15] PCI: dwc: Check iATU in/outbound ranges setup methods status Serge Semin
2022-08-01 13:54   ` Manivannan Sadhasivam
2022-08-01 20:17     ` Bjorn Helgaas
2022-06-24 14:39 ` [PATCH RESEND v4 15/15] PCI: dwc: Introduce dma-ranges property support for RC-host Serge Semin
2022-07-28 22:11   ` Bjorn Helgaas
2022-07-29  4:52     ` Serge Semin
2022-07-29 11:33       ` Bjorn Helgaas
2022-07-29 14:38         ` Serge Semin
2022-08-01 14:00   ` Manivannan Sadhasivam
2022-08-09 20:07     ` Serge Semin
2022-07-11 18:48 ` [PATCH RESEND v4 00/15] PCI: dwc: Add hw version and dma-ranges support Serge Semin
2022-07-27 22:49 ` Bjorn Helgaas
2022-07-28 12:21   ` Serge Semin
2022-07-29  2:36 ` Bjorn Helgaas
2022-09-28  8:10   ` Lorenzo Pieralisi
2022-09-28 10:53     ` Serge Semin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220801133641.GI93763@thinkpad \
    --to=manivannan.sadhasivam@linaro.org \
    --cc=Alexey.Malahov@baikalelectronics.ru \
    --cc=Frank.Li@nxp.com \
    --cc=Pavel.Parkhomenko@baikalelectronics.ru \
    --cc=Sergey.Semin@baikalelectronics.ru \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=fancer.lancer@gmail.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=kw@linux.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=lpieralisi@kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).