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From: Conor Dooley <mail@conchuod.ie>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Anup Patel <anup@brainfault.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>, Sagar Kadam <sagar.kadam@sifive.com>,
	Jessica Clarke <jrtc27@jrtc27.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, qemu-riscv@nongnu.org,
	Rob Herring <robh@kernel.org>
Subject: [PATCH v3 1/4] dt-bindings: timer: sifive,clint: add legacy riscv compatible
Date: Wed, 17 Aug 2022 21:12:10 +0100	[thread overview]
Message-ID: <20220817201212.990712-2-mail@conchuod.ie> (raw)
In-Reply-To: <20220817201212.990712-1-mail@conchuod.ie>

From: Conor Dooley <conor.dooley@microchip.com>

While "real" hardware might not use the compatible string "riscv,clint0"
it is present in the driver & QEMU uses it for automatically generated
virt machine dtbs. To avoid dt-validate problems with QEMU produced
dtbs, such as the following, add it to the binding.

riscv-virt.dtb: clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'starfive,jh7100-clint', 'canaan,k210-clint']

Reported-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/timer/sifive,clint.yaml           | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index e64f46339079..bbad24165837 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -22,12 +22,18 @@ description:
 
 properties:
   compatible:
-    items:
-      - enum:
-          - sifive,fu540-c000-clint
-          - starfive,jh7100-clint
-          - canaan,k210-clint
-      - const: sifive,clint0
+    oneOf:
+      - items:
+          - enum:
+              - sifive,fu540-c000-clint
+              - starfive,jh7100-clint
+              - canaan,k210-clint
+          - const: sifive,clint0
+      - items:
+          - const: sifive,clint0
+          - const: riscv,clint0
+        deprecated: true
+        description: For the QEMU virt machine only
 
     description:
       Should be "<vendor>,<chip>-clint" and "sifive,clint<version>".
-- 
2.37.1


  reply	other threads:[~2022-08-17 20:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17 20:12 [PATCH v3 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings Conor Dooley
2022-08-17 20:12 ` Conor Dooley [this message]
2022-08-18 16:36   ` [PATCH v3 1/4] dt-bindings: timer: sifive,clint: add legacy riscv compatible Rob Herring
2022-08-17 20:12 ` [PATCH v3 2/4] dt-bindings: interrupt-controller: sifive,plic: " Conor Dooley
2022-08-18 16:36   ` Rob Herring
2022-08-17 20:12 ` [PATCH v3 3/4] dt-bindings: riscv: add new riscv,isa strings for emulators Conor Dooley
2022-08-18  1:34   ` Guo Ren
2022-08-18  5:40   ` Andrew Jones
2022-08-18  5:48     ` Andrew Jones
2022-08-18  6:24       ` Conor.Dooley
2022-08-17 20:12 ` [NOT FOR INCLUSION v3 4/4] dt-bindings: riscv: isa string bonus content Conor Dooley

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