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From: Conor Dooley <conor.dooley@microchip.com>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Daire McNamara <daire.mcnamara@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: [PATCH v3 13/13] clk: microchip: mpfs: update module authorship & licencing
Date: Fri, 19 Aug 2022 10:53:21 +0100	[thread overview]
Message-ID: <20220819095320.40006-14-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220819095320.40006-1-conor.dooley@microchip.com>

Padmarao wrote the driver in its original, pre upstream form.
Daire & myself have been responsible for getting it upstreamable and
subsequent development.
Move Daire out of the blurb & into a MODULE_AUTHOR entry & add entries
for myself and Padmarao.

While we are at it, convert the MODULE_LICENSE field to its preferred
form of "GPL".

Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/clk/microchip/clk-mpfs.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c
index 35a67d2b7845..dceae0c9b9d1 100644
--- a/drivers/clk/microchip/clk-mpfs.c
+++ b/drivers/clk/microchip/clk-mpfs.c
@@ -1,7 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Daire McNamara,<daire.mcnamara@microchip.com>
- * Copyright (C) 2020 Microchip Technology Inc.  All rights reserved.
+ * PolarFire SoC MSS/core complex clock control
+ *
+ * Copyright (C) 2020-2022 Microchip Technology Inc. All rights reserved.
  */
 #include <linux/auxiliary_bus.h>
 #include <linux/clk-provider.h>
@@ -513,4 +514,7 @@ static void __exit clk_mpfs_exit(void)
 module_exit(clk_mpfs_exit);
 
 MODULE_DESCRIPTION("Microchip PolarFire SoC Clock Driver");
-MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Padmarao Begari <padmarao.begari@microchip.com>");
+MODULE_AUTHOR("Daire McNamara <daire.mcnamara@microchip.com>");
+MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
+MODULE_LICENSE("GPL");
-- 
2.36.1


      parent reply	other threads:[~2022-08-19  9:56 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-19  9:53 [PATCH v3 00/13] PolarFire SoC reset controller & clock cleanups Conor Dooley
2022-08-19  9:53 ` [PATCH v3 01/13] clk: microchip: mpfs: fix clk_cfg array bounds violation Conor Dooley
2022-08-19  9:53 ` [PATCH v3 02/13] dt-bindings: clk: microchip: mpfs: add reset controller support Conor Dooley
2022-08-19  9:53 ` [PATCH v3 03/13] clk: microchip: mpfs: add reset controller Conor Dooley
2022-08-30  6:40   ` Claudiu.Beznea
2022-08-30  6:44     ` Conor.Dooley
2022-08-19  9:53 ` [PATCH v3 04/13] reset: add polarfire soc reset support Conor Dooley
2022-08-19  9:53 ` [PATCH v3 05/13] MAINTAINERS: add polarfire soc reset controller Conor Dooley
2022-08-19  9:53 ` [PATCH v3 06/13] riscv: dts: microchip: add mpfs specific macb reset support Conor Dooley
2022-08-19  9:53 ` [PATCH v3 07/13] clk: microchip: mpfs: add MSS pll's set & round rate Conor Dooley
2022-08-19  9:53 ` [PATCH v3 08/13] clk: microchip: mpfs: move id & offset out of clock structs Conor Dooley
2022-08-19  9:53 ` [PATCH v3 09/13] clk: microchip: mpfs: simplify control reg access Conor Dooley
2022-08-19  9:53 ` [PATCH v3 10/13] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Conor Dooley
2022-08-19  9:53 ` [PATCH v3 11/13] clk: microchip: mpfs: convert cfg_clk to clk_divider Conor Dooley
2022-08-19  9:53 ` [PATCH v3 12/13] clk: microchip: mpfs: convert periph_clk to clk_gate Conor Dooley
2022-08-19  9:53 ` Conor Dooley [this message]

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