devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lucas Stach <l.stach@pengutronix.de>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org,
	vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de,
	richard.leitner@linux.dev, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com
Subject: [PATCH 2/2] fixup! phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support
Date: Mon, 29 Aug 2022 17:16:23 +0200	[thread overview]
Message-ID: <20220829151623.808344-2-l.stach@pengutronix.de> (raw)
In-Reply-To: <20220829151623.808344-1-l.stach@pengutronix.de>

---
 drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 31 +++-------------------
 1 file changed, 3 insertions(+), 28 deletions(-)

diff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
index 3463b4299f2f..f714f419b91f 100644
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
+#include <linux/of_device.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
@@ -47,10 +48,6 @@
 #define IMX8MM_GPR_PCIE_SSC_EN		BIT(16)
 #define IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE	BIT(9)
 
-#define IMX8MP_GPR_REG0			0x0
-#define IMX8MP_GPR_PHY_APB_RST		BIT(4)
-#define IMX8MP_GPR_PHY_INIT_RST		BIT(5)
-
 enum imx8_pcie_phy_type {
 	IMX8MM,
 	IMX8MP,
@@ -58,10 +55,8 @@ enum imx8_pcie_phy_type {
 
 struct imx8_pcie_phy {
 	void __iomem		*base;
-	struct device		*dev;
 	struct clk		*clk;
 	struct phy		*phy;
-	struct regmap		*hsio_blk_ctrl;
 	struct regmap		*iomuxc_gpr;
 	struct reset_control	*reset;
 	struct reset_control	*perst;
@@ -93,13 +88,6 @@ static int imx8_pcie_phy_init(struct phy *phy)
 		break;
 	case IMX8MP:
 		reset_control_assert(imx8_phy->perst);
-
-		/* release pcie_phy_apb_reset and pcie_phy_init_resetn */
-		regmap_update_bits(imx8_phy->hsio_blk_ctrl, IMX8MP_GPR_REG0,
-				   IMX8MP_GPR_PHY_APB_RST |
-				   IMX8MP_GPR_PHY_INIT_RST,
-				   IMX8MP_GPR_PHY_APB_RST |
-				   IMX8MP_GPR_PHY_INIT_RST);
 		break;
 	}
 
@@ -204,21 +192,16 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev)
 {
 	struct phy_provider *phy_provider;
 	struct device *dev = &pdev->dev;
-	const struct of_device_id *of_id;
 	struct device_node *np = dev->of_node;
 	struct imx8_pcie_phy *imx8_phy;
 	struct resource *res;
 
-	of_id = of_match_device(imx8_pcie_phy_of_match, dev);
-	if (!of_id)
-		return -EINVAL;
-
 	imx8_phy = devm_kzalloc(dev, sizeof(*imx8_phy), GFP_KERNEL);
 	if (!imx8_phy)
 		return -ENOMEM;
 
-	imx8_phy->dev = dev;
-	imx8_phy->variant = (enum imx8_pcie_phy_type)of_id->data;
+	imx8_phy->variant =
+		(enum imx8_pcie_phy_type)of_device_get_match_data(dev);
 
 	/* get PHY refclk pad mode */
 	of_property_read_u32(np, "fsl,refclk-pad-mode",
@@ -257,14 +240,6 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev)
 		return PTR_ERR(imx8_phy->reset);
 	}
 	if (imx8_phy->variant == IMX8MP) {
-		/* Grab HSIO MIX config register range */
-		imx8_phy->hsio_blk_ctrl =
-			 syscon_regmap_lookup_by_compatible("fsl,imx8mp-hsio-blk-ctrl");
-		if (IS_ERR(imx8_phy->hsio_blk_ctrl)) {
-			dev_err(dev, "Unable to find HSIO MIX registers\n");
-			return PTR_ERR(imx8_phy->hsio_blk_ctrl);
-		}
-
 		imx8_phy->perst =
 			devm_reset_control_get_exclusive(dev, "perst");
 		if (IS_ERR(imx8_phy->perst)) {
-- 
2.30.2


  reply	other threads:[~2022-08-29 15:16 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-29  8:15 [PATCH v4 0/6] Add iMX8MP PCIe support Richard Zhu
2022-08-29  8:15 ` [PATCH v4 1/6] reset: imx7: Fix the iMX8MP PCIe PHY PERST support Richard Zhu
2022-08-29  8:15 ` [PATCH v4 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding Richard Zhu
2022-08-29  8:15 ` [PATCH v4 3/6] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support Richard Zhu
2022-08-29  8:15 ` [PATCH v4 4/6] arm64: dts: imx8mp: Add iMX8MP PCIe support Richard Zhu
2022-08-29 15:23   ` Lucas Stach
2022-08-30  2:58     ` Hongxing Zhu
2022-08-29  8:15 ` [PATCH v4 5/6] arm64: dts: imx8mp-evk: Add " Richard Zhu
2022-08-29  8:15 ` [PATCH v4 6/6] PCI: imx6: Add iMX8MP " Richard Zhu
2022-08-29 15:16 ` [PATCH 1/2] soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets Lucas Stach
2022-08-29 15:16   ` Lucas Stach [this message]
2022-08-30  7:45     ` [PATCH 2/2] fixup! phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support Vinod Koul
2022-08-29 15:20 ` [PATCH v4 0/6] Add iMX8MP PCIe support Lucas Stach
2022-08-30  2:58   ` Hongxing Zhu
2022-08-30  7:46     ` Lucas Stach
2022-08-30  7:52       ` Hongxing Zhu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220829151623.808344-2-l.stach@pengutronix.de \
    --to=l.stach@pengutronix.de \
    --cc=alexander.stein@ew.tq-group.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=hongxing.zhu@nxp.com \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=marex@denx.de \
    --cc=p.zabel@pengutronix.de \
    --cc=richard.leitner@linux.dev \
    --cc=robh@kernel.org \
    --cc=shawnguo@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).