From: Rob Herring <robh@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Michal Simek <michal.simek@xilinx.com>,
Borislav Petkov <bp@alien8.de>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Tony Luck <tony.luck@intel.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Manish Narani <manish.narani@xilinx.com>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Michail Ivanov <Michail.Ivanov@baikalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>,
Dinh Nguyen <dinguyen@kernel.org>,
James Morse <james.morse@arm.com>,
Robert Richter <rric@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [PATCH 02/13] dt-bindings: memory: snps: Add Baikal-T1 DDRC support
Date: Tue, 30 Aug 2022 13:00:28 -0500 [thread overview]
Message-ID: <20220830180028.GA1758236-robh@kernel.org> (raw)
In-Reply-To: <20220822191957.28546-3-Sergey.Semin@baikalelectronics.ru>
On Mon, Aug 22, 2022 at 10:19:45PM +0300, Serge Semin wrote:
> Baikal-T1 DDR controller is based on the DW uMCTL2 DDRC IP-core v2.51a
> with up to DDR3 protocol capability and 32-bit data bus + 8-bit ECC. There
> are individual IRQs for each ECC and DFI events.The dedicated scrubber
> clock source is absent since it's fully synchronous to the core clock.
> In addition to that the DFI-DDR PHY CSRs can be accessed via a separate
> registers space.
Are you sure the phy and dfi irq shouldn't be a separate device?
Rob
next prev parent reply other threads:[~2022-08-30 18:01 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 19:19 [PATCH 00/13] EDAC/synopsys: Add generic resources and Baikal-T1 support Serge Semin
2022-08-22 19:19 ` [PATCH 01/13] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props Serge Semin
2022-08-23 8:11 ` Krzysztof Kozlowski
2022-08-26 8:47 ` Serge Semin
2022-08-30 15:01 ` Krzysztof Kozlowski
2022-09-09 7:49 ` Serge Semin
2022-08-22 19:19 ` [PATCH 02/13] dt-bindings: memory: snps: Add Baikal-T1 DDRC support Serge Semin
2022-08-23 8:12 ` Krzysztof Kozlowski
2022-08-26 9:54 ` Serge Semin
2022-09-05 10:14 ` Krzysztof Kozlowski
2022-09-08 9:46 ` Serge Semin
2022-09-08 9:58 ` Krzysztof Kozlowski
2022-09-08 15:08 ` Serge Semin
2022-09-08 15:27 ` Krzysztof Kozlowski
2022-09-08 15:40 ` Serge Semin
2022-08-30 18:00 ` Rob Herring [this message]
2022-09-09 12:57 ` Serge Semin
2022-08-22 19:19 ` [PATCH 03/13] EDAC/synopsys: Add multi-ranked memory support Serge Semin
2022-08-22 19:19 ` [PATCH 04/13] EDAC/synopsys: Add optional ECC Scrub support Serge Semin
2022-08-22 19:19 ` [PATCH 05/13] EDAC/synopsys: Drop ECC poison address from private data Serge Semin
2022-08-22 19:19 ` [PATCH 06/13] EDAC/synopsys: Add data poisoning disable support Serge Semin
2022-08-22 19:19 ` [PATCH 07/13] EDAC/synopsys: Split up ECC UE/CE IRQs handler Serge Semin
2022-08-22 19:19 ` [PATCH 08/13] EDAC/synopsys: Add individual named ECC IRQs support Serge Semin
2022-08-22 19:19 ` [PATCH 09/13] EDAC/synopsys: Add DFI alert_n IRQ support Serge Semin
2022-08-22 19:19 ` [PATCH 10/13] EDAC/synopsys: Add reference clocks support Serge Semin
2022-08-22 19:19 ` [PATCH 11/13] EDAC/synopsys: Add ECC Scrubber support Serge Semin
2022-08-22 19:19 ` [PATCH 12/13] EDAC/synopsys: Drop vendor-specific arch dependency Serge Semin
2022-08-22 19:19 ` [PATCH 13/13] EDAC/synopsys: Add Baikal-T1 DDRC support Serge Semin
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