* [PATCH v3 1/3] dt-bindings: arm: rockchip: Document Radxa ROCK 4C+ @ 2022-08-30 6:51 Jagan Teki 2022-08-30 6:51 ` [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table Jagan Teki 2022-08-30 6:51 ` [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ Jagan Teki 0 siblings, 2 replies; 5+ messages in thread From: Jagan Teki @ 2022-08-30 6:51 UTC (permalink / raw) To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski Cc: FUKAUMI Naoki, devicetree, linux-arm-kernel, linux-rockchip, linux-amarula, Jagan Teki, Krzysztof Kozlowski Document the dt-bindings for Radxa ROCK 4C+ SBC. Key differences of 4C+ compared to previous ROCK Pi 4. - Rockchip RK3399-T SoC - DP from 4C replaced with micro HDMI 2K@60fps - 4-lane MIPI DSI with 1920*1080 - RK817 Audio codec Also, an official naming convention from Radxa mention to remove Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not Radxa ROCK Pi 4C+. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - updated commit message Changes for v2: - fix line wrapping - collect Krzysztof Ack Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7811ba64149c..ec3525fb1e60 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -537,6 +537,11 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK 4C+ + items: + - const: radxa,rock-4c-plus + - const: rockchip,rk3399 + - description: Radxa ROCK Pi E items: - const: radxa,rockpi-e -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table 2022-08-30 6:51 [PATCH v3 1/3] dt-bindings: arm: rockchip: Document Radxa ROCK 4C+ Jagan Teki @ 2022-08-30 6:51 ` Jagan Teki 2022-08-30 9:25 ` Krzysztof Kozlowski 2022-08-30 6:51 ` [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ Jagan Teki 1 sibling, 1 reply; 5+ messages in thread From: Jagan Teki @ 2022-08-30 6:51 UTC (permalink / raw) To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski Cc: FUKAUMI Naoki, devicetree, linux-arm-kernel, linux-rockchip, linux-amarula, Jagan Teki RK3399-T is down-clocked version of RK3399 SoC operated at 1.5GHz. Add CPU operating points table for it. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - new patch .../arm64/boot/dts/rockchip/rk3399-t-opp.dtsi | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi new file mode 100644 index 000000000000..b41c765bd07b --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2022 Radxa Limited + */ + +/ { + cluster0_opp: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <875000 875000 1250000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <900000 900000 1250000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <975000 975000 1250000>; + }; + }; + + cluster1_opp: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <875000 875000 1250000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <925000 925000 1250000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1000000 1000000 1250000>; + }; + opp05 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1075000 1075000 1250000>; + }; + opp06 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1150000 1150000 1250000>; + }; + }; + + gpu_opp_table: opp-table2 { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp02 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <975000 975000 1150000>; + }; + }; +}; + +&cpu_l0 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l1 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l2 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l3 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_b0 { + operating-points-v2 = <&cluster1_opp>; +}; + +&cpu_b1 { + operating-points-v2 = <&cluster1_opp>; +}; + +&gpu { + operating-points-v2 = <&gpu_opp_table>; +}; -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table 2022-08-30 6:51 ` [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table Jagan Teki @ 2022-08-30 9:25 ` Krzysztof Kozlowski 0 siblings, 0 replies; 5+ messages in thread From: Krzysztof Kozlowski @ 2022-08-30 9:25 UTC (permalink / raw) To: Jagan Teki, Heiko Stuebner, Rob Herring, Krzysztof Kozlowski Cc: FUKAUMI Naoki, devicetree, linux-arm-kernel, linux-rockchip, linux-amarula On 30/08/2022 09:51, Jagan Teki wrote: > RK3399-T is down-clocked version of RK3399 SoC operated at 1.5GHz. > > Add CPU operating points table for it. > > Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v3: > - new patch > > .../arm64/boot/dts/rockchip/rk3399-t-opp.dtsi | 114 ++++++++++++++++++ > 1 file changed, 114 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi > new file mode 100644 > index 000000000000..b41c765bd07b > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi > @@ -0,0 +1,114 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd > + * Copyright (c) 2022 Radxa Limited > + */ > + > +/ { > + cluster0_opp: opp-table0 { Test your DTS. Node name: opp-table-0 Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ 2022-08-30 6:51 [PATCH v3 1/3] dt-bindings: arm: rockchip: Document Radxa ROCK 4C+ Jagan Teki 2022-08-30 6:51 ` [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table Jagan Teki @ 2022-08-30 6:51 ` Jagan Teki 2022-09-01 4:18 ` FUKAUMI Naoki 1 sibling, 1 reply; 5+ messages in thread From: Jagan Teki @ 2022-08-30 6:51 UTC (permalink / raw) To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski Cc: FUKAUMI Naoki, devicetree, linux-arm-kernel, linux-rockchip, linux-amarula, Jagan Teki, Stephen Chen, Manoj Sai Add support for Radxa ROCK 4C+ SBC. Key differences of 4C+ compared to previous ROCK Pi 4. - Rockchip RK3399-T SoC - DP from 4C replaced with micro HDMI 2K@60fps - 4-lane MIPI DSI with 1920*1080 - RK817 Audio codec Also, an official naming convention from Radxa mention to remove Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not Radxa ROCK Pi 4C+. Signed-off-by: Stephen Chen <stephen@radxa.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - updated commit message - include sdhci in aliases - add i2s2 - add sdmmc cd-gpios - use rk3399-t-opp.dtsi Changes for v2: - s/vcc-sys/vcc5v0-sys-regulator - used proper node name 'regulator' for syr828 regulator nodes. - fix line wrapping. arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-rock-4c-plus.dts | 647 ++++++++++++++++++ 2 files changed, 648 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ef79a672804a..f92637eb6f90 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-4c-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts new file mode 100644 index 000000000000..33c5976d158e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts @@ -0,0 +1,647 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2019 Radxa Limited + * Copyright (c) 2022 Amarula Solutions(India) + */ + +/dts-v1/; +#include "rk3399.dtsi" +#include "rk3399-t-opp.dtsi" + +/ { + model = "Radxa ROCK 4C+"; + compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; + + aliases { + mmc0 = &sdmmc; + mmc1 = &sdhci; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc5v0_host1: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host1"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_host0_s0>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec0_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_lan: vcc3v3-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_lan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x2a>; + rx_delay = <0x21>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + i2c-scl-falling-time-ns = <30>; + i2c-scl-rising-time-ns = <180>; + clock-frequency = <400000>; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc_buck5>; + vcc6-supply = <&vcc_buck5>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_log: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_log"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_cpu_l"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc3v3_sys"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_buck5: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_buck5"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_0v9: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vcca_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc0v9_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vcc0v9_soc"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcca_1v8: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_mipi: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_mipi"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc_1v5"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_3v0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_cam: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_cam"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v0_host0_s0: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host0_s0"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + lcd_3v3: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "lcd_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-compatible = "fan53555-reg"; + pinctrl-0 = <&vsel1_gpio>; + vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-compatible = "fan53555-reg"; + pinctrl-0 = <&vsel2_gpio>; + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + bt656-supply = <&vcc_3v0>; + gpio1830-supply = <&vcc_3v0>; + sdmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&pinctrl { + bt { + bt_enable_h: bt-enable-h { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>, + <4 9 1 &pcfg_pull_up_8ma>, + <4 10 1 &pcfg_pull_up_8ma>, + <4 11 1 &pcfg_pull_up_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>; + }; + }; + + usb-typec { + vcc5v0_typec0_en: vcc5v0-typec-en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + wifi { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_host_wake_l: wifi-host-wake-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sdhci { + max-frequency = <150000000>; + bus-width = <8>; + mmc-hs400-1_8v; + supports-emmc; + non-removable; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdio0 { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + clock-frequency = <50000000>; + cap-sdio-irq; + cap-sd-highspeed; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_l>; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <800>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host1>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host1>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4345c5"; + clocks = <&rk809 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + extcon = <&u2phy0>; + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "host"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ 2022-08-30 6:51 ` [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ Jagan Teki @ 2022-09-01 4:18 ` FUKAUMI Naoki 0 siblings, 0 replies; 5+ messages in thread From: FUKAUMI Naoki @ 2022-09-01 4:18 UTC (permalink / raw) To: jagan Cc: abbaraju.manojsai, devicetree, heiko, krzysztof.kozlowski+dt, linux-amarula, linux-arm-kernel, linux-rockchip, naoki, robh+dt, stephen > Add support for Radxa ROCK 4C+ SBC. > > Key differences of 4C+ compared to previous ROCK Pi 4. > - Rockchip RK3399-T SoC > - DP from 4C replaced with micro HDMI 2K@60fps > - 4-lane MIPI DSI with 1920*1080 > - RK817 Audio codec > > Also, an official naming convention from Radxa mention to remove > Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not > Radxa ROCK Pi 4C+. > > Signed-off-by: Stephen Chen <stephen@radxa.com> > Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v3: > - updated commit message > - include sdhci in aliases > - add i2s2 > - add sdmmc cd-gpios > - use rk3399-t-opp.dtsi > Changes for v2: > - s/vcc-sys/vcc5v0-sys-regulator > - used proper node name 'regulator' for syr828 regulator nodes. > - fix line wrapping. > > arch/arm64/boot/dts/rockchip/Makefile | 1 + > .../boot/dts/rockchip/rk3399-rock-4c-plus.dts | 647 ++++++++++++++++++ > 2 files changed, 648 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index ef79a672804a..f92637eb6f90 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-plus.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-4c-plus.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a-plus.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts > new file mode 100644 > index 000000000000..33c5976d158e > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts > @@ -0,0 +1,647 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd > + * Copyright (c) 2019 Radxa Limited > + * Copyright (c) 2022 Amarula Solutions(India) > + */ > + > +/dts-v1/; > +#include "rk3399.dtsi" > +#include "rk3399-t-opp.dtsi" > + > +/ { > + model = "Radxa ROCK 4C+"; > + compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; > + > + aliases { > + mmc0 = &sdmmc; > + mmc1 = &sdhci; > + }; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + clocks = <&rk809 1>; > + clock-names = "ext_clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&wifi_enable_h>; > + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; > + }; > + > + clkin_gmac: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "clkin_gmac"; > + #clock-cells = <0>; > + }; > + > + vcc5v0_sys: vcc5v0-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > + > + vcc5v0_host1: vcc5v0-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_host_en>; > + regulator-name = "vcc5v0_host1"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc5v0_host0_s0>; > + }; > + > + vcc5v0_typec: vcc5v0-typec-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_typec0_en>; > + regulator-name = "vcc5v0_typec"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc5v0_sys>; > + }; > + > + vcc_lan: vcc3v3-phy-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_lan"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&gmac { > + assigned-clocks = <&cru SCLK_RMII_SRC>; > + assigned-clock-parents = <&clkin_gmac>; > + clock_in_out = "input"; > + phy-supply = <&vcc_lan>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii_pins>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + tx_delay = <0x2a>; > + rx_delay = <0x21>; > + status = "okay"; > +}; > + > +&gpu { > + mali-supply = <&vdd_gpu>; > + status = "okay"; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&i2c3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hdmi_cec>; > + status = "okay"; > +}; > + > +&hdmi_sound { > + status = "okay"; > +}; > + > +&i2c0 { > + status = "okay"; > + i2c-scl-falling-time-ns = <30>; > + i2c-scl-rising-time-ns = <180>; > + clock-frequency = <400000>; > + > + rk809: pmic@20 { > + compatible = "rockchip,rk809"; > + reg = <0x20>; > + interrupt-parent = <&gpio1>; > + interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + clock-output-names = "rk808-clkout1", "rk808-clkout2"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>; > + rockchip,system-power-controller; > + wakeup-source; > + > + vcc1-supply = <&vcc5v0_sys>; > + vcc2-supply = <&vcc5v0_sys>; > + vcc3-supply = <&vcc5v0_sys>; > + vcc4-supply = <&vcc5v0_sys>; > + vcc5-supply = <&vcc_buck5>; > + vcc6-supply = <&vcc_buck5>; > + vcc7-supply = <&vcc5v0_sys>; > + vcc8-supply = <&vcc3v3_sys>; > + vcc9-supply = <&vcc5v0_sys>; > + > + regulators { > + vdd_log: DCDC_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_log"; > + regulator-state-mem { > + regulator-off-in-suspend; > + regulator-suspend-microvolt = <900000>; > + }; > + }; > + > + vdd_cpu_l: DCDC_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_cpu_l"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-name = "vcc_ddr"; > + regulator-initial-mode = <0x2>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc3v3_sys: DCDC_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vcc3v3_sys"; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcc_buck5: DCDC_REG5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc_buck5"; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcca_0v9: LDO_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vcca_0v9"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v8: LDO_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc_1v8"; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc0v9_soc: LDO_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vcc0v9_soc"; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <900000>; > + }; > + }; > + > + vcca_1v8: LDO_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca_1v8"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_mipi: LDO_REG5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-name = "vcc_mipi"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v5: LDO_REG6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-name = "vcc_1v5"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_3v0: LDO_REG7 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-name = "vcc_3v0"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG8 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_sd"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_cam: LDO_REG9 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc_cam"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc5v0_host0_s0: SWITCH_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-name = "vcc5v0_host0_s0"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + lcd_3v3: SWITCH_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-name = "lcd_3v3"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > + > + vdd_cpu_b: regulator@40 { > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <1>; > + regulator-compatible = "fan53555-reg"; > + pinctrl-0 = <&vsel1_gpio>; > + vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc5v0_sys>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: regulator@41 { > + compatible = "silergy,syr828"; > + reg = <0x41>; > + fcs,suspend-voltage-selector = <1>; > + regulator-compatible = "fan53555-reg"; > + pinctrl-0 = <&vsel2_gpio>; > + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; > + regulator-name = "vdd_gpu"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc5v0_sys>; > + regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > +}; > + > +&i2c3 { > + i2c-scl-rising-time-ns = <450>; > + i2c-scl-falling-time-ns = <15>; > + status = "okay"; > +}; > + > +&i2s2 { > + status = "okay"; > +}; > + > +&io_domains { > + bt656-supply = <&vcc_3v0>; > + gpio1830-supply = <&vcc_3v0>; > + sdmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&pinctrl { > + bt { > + bt_enable_h: bt-enable-h { > + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + bt_host_wake_l: bt-host-wake-l { > + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + bt_wake_l: bt-wake-l { > + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + vsel1_gpio: vsel1-gpio { > + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + vsel2_gpio: vsel2-gpio { > + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; > + > + sdmmc { > + sdmmc_bus4: sdmmc-bus4 { > + rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>, > + <4 9 1 &pcfg_pull_up_8ma>, > + <4 10 1 &pcfg_pull_up_8ma>, > + <4 11 1 &pcfg_pull_up_8ma>; > + }; > + > + sdmmc_clk: sdmmc-clk { > + rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>; > + }; > + > + sdmmc_cmd: sdmmc-cmd { > + rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>; > + }; > + }; > + > + usb-typec { > + vcc5v0_typec0_en: vcc5v0-typec-en { > + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb2 { > + vcc5v0_host_en: vcc5v0-host-en { > + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + wifi { > + wifi_enable_h: wifi-enable-h { > + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + wifi_host_wake_l: wifi-host-wake-l { > + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pmu_io_domains { > + pmu1830-supply = <&vcc_3v0>; > + status = "okay"; > +}; > + > +&saradc { > + status = "okay"; > + vref-supply = <&vcc_1v8>; > +}; > + > +&sdhci { > + max-frequency = <150000000>; > + bus-width = <8>; > + mmc-hs400-1_8v; > + supports-emmc; this property should be only for vendor kernel. FUKAUMI Naoki > + non-removable; > + mmc-hs400-enhanced-strobe; > + status = "okay"; > +}; > + > +&sdio0 { > + #address-cells = <1>; > + #size-cells = <0>; > + bus-width = <4>; > + clock-frequency = <50000000>; > + cap-sdio-irq; > + cap-sd-highspeed; > + keep-power-in-suspend; > + mmc-pwrseq = <&sdio_pwrseq>; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; > + sd-uhs-sdr104; > + status = "okay"; > + > + brcmf: wifi@1 { > + compatible = "brcm,bcm4329-fmac"; > + reg = <1>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "host-wake"; > + pinctrl-names = "default"; > + pinctrl-0 = <&wifi_host_wake_l>; > + }; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + card-detect-delay = <800>; > + disable-wp; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; > + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&tcphy0 { > + status = "okay"; > +}; > + > +&tcphy1 { > + status = "okay"; > +}; > + > +&u2phy0 { > + status = "okay"; > + > + u2phy0_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy0_host: host-port { > + phy-supply = <&vcc5v0_host1>; > + status = "okay"; > + }; > +}; > + > +&u2phy1 { > + status = "okay"; > + > + u2phy1_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy1_host: host-port { > + phy-supply = <&vcc5v0_host1>; > + status = "okay"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; > + status = "okay"; > + > + bluetooth { > + compatible = "brcm,bcm4345c5"; > + clocks = <&rk809 1>; > + clock-names = "lpo"; > + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; > + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; > + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; > + max-speed = <1500000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; > + vbat-supply = <&vcc3v3_sys>; > + vddio-supply = <&vcc_1v8>; > + }; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb_host1_ehci { > + status = "okay"; > +}; > + > +&usb_host1_ohci { > + status = "okay"; > +}; > + > +&usbdrd3_0 { > + extcon = <&u2phy0>; > + status = "okay"; > +}; > + > +&usbdrd_dwc3_0 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&usbdrd3_1 { > + status = "okay"; > +}; > + > +&usbdrd_dwc3_1 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&vopb { > + status = "okay"; > +}; > + > +&vopb_mmu { > + status = "okay"; > +}; > + > +&vopl { > + status = "okay"; > +}; > + > +&vopl_mmu { > + status = "okay"; > +}; > -- > 2.25.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-09-01 4:29 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-08-30 6:51 [PATCH v3 1/3] dt-bindings: arm: rockchip: Document Radxa ROCK 4C+ Jagan Teki 2022-08-30 6:51 ` [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table Jagan Teki 2022-08-30 9:25 ` Krzysztof Kozlowski 2022-08-30 6:51 ` [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ Jagan Teki 2022-09-01 4:18 ` FUKAUMI Naoki
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