From: Nipun Gupta <nipun.gupta@amd.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<gregkh@linuxfoundation.org>, <rafael@kernel.org>,
<eric.auger@redhat.com>, <alex.williamson@redhat.com>,
<cohuck@redhat.com>, <puneet.gupta@amd.com>,
<song.bao.hua@hisilicon.com>, <mchehab+huawei@kernel.org>,
<maz@kernel.org>, <f.fainelli@gmail.com>,
<jeffrey.l.hugo@gmail.com>, <saravanak@google.com>,
<Michael.Srba@seznam.cz>, <mani@kernel.org>, <yishaih@nvidia.com>,
<jgg@ziepe.ca>, <jgg@nvidia.com>, <robin.murphy@arm.com>,
<will@kernel.org>, <joro@8bytes.org>, <masahiroy@kernel.org>,
<ndesaulniers@google.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-kbuild@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <kvm@vger.kernel.org>
Cc: <okaya@kernel.org>, <harpreet.anand@amd.com>,
<nikhil.agarwal@amd.com>, <michal.simek@amd.com>,
<aleksandar.radovanovic@amd.com>, <git@amd.com>,
Nipun Gupta <nipun.gupta@amd.com>
Subject: [RFC PATCH v3 7/7] vfio/cdx: add interrupt support
Date: Tue, 6 Sep 2022 19:18:01 +0530 [thread overview]
Message-ID: <20220906134801.4079497-8-nipun.gupta@amd.com> (raw)
In-Reply-To: <20220906134801.4079497-1-nipun.gupta@amd.com>
This patch allows to set an eventfd for cdx device interrupts
and also to trigger the interrupt eventfd from userspace.
All CDX device interrupts are MSIs. The MSIs are allocated from
the CDX-MSI domain.
Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
---
drivers/vfio/cdx/vfio_cdx.c | 53 +++++++
drivers/vfio/cdx/vfio_cdx_intr.c | 212 ++++++++++++++++++++++++++++
drivers/vfio/cdx/vfio_cdx_private.h | 18 +++
3 files changed, 283 insertions(+)
create mode 100644 drivers/vfio/cdx/vfio_cdx_intr.c
diff --git a/drivers/vfio/cdx/vfio_cdx.c b/drivers/vfio/cdx/vfio_cdx.c
index 2e5bd494057a..4591b8057b2f 100644
--- a/drivers/vfio/cdx/vfio_cdx.c
+++ b/drivers/vfio/cdx/vfio_cdx.c
@@ -77,6 +77,8 @@ static void vfio_cdx_close_device(struct vfio_device *core_vdev)
if (WARN_ON(ret))
dev_warn(core_vdev->dev,
"VFIO_CDX: reset device has failed (%d)\n", ret);
+
+ vfio_cdx_irqs_cleanup(vdev);
}
static long vfio_cdx_ioctl(struct vfio_device *core_vdev,
@@ -132,6 +134,57 @@ static long vfio_cdx_ioctl(struct vfio_device *core_vdev,
return -EFAULT;
return 0;
}
+ case VFIO_DEVICE_GET_IRQ_INFO:
+ {
+ struct vfio_irq_info info;
+
+ minsz = offsetofend(struct vfio_irq_info, count);
+ if (copy_from_user(&info, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ if (info.argsz < minsz)
+ return -EINVAL;
+
+ if (info.index >= 1)
+ return -EINVAL;
+
+ info.flags = VFIO_IRQ_INFO_EVENTFD;
+ info.count = cdx_dev->num_msi;
+
+ if (copy_to_user((void __user *)arg, &info, minsz))
+ return -EFAULT;
+ return 0;
+ }
+ case VFIO_DEVICE_SET_IRQS:
+ {
+ struct vfio_irq_set hdr;
+ u8 *data = NULL;
+ int ret = 0;
+ size_t data_size = 0;
+
+ minsz = offsetofend(struct vfio_irq_set, count);
+
+ if (copy_from_user(&hdr, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ ret = vfio_set_irqs_validate_and_prepare(&hdr,
+ cdx_dev->num_msi, 1, &data_size);
+ if (ret)
+ return ret;
+
+ if (data_size) {
+ data = memdup_user((void __user *)(arg + minsz),
+ data_size);
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+ }
+
+ ret = vfio_cdx_set_irqs_ioctl(vdev, hdr.flags,
+ hdr.index, hdr.start, hdr.count, data);
+ kfree(data);
+
+ return ret;
+ }
case VFIO_DEVICE_RESET:
{
return vfio_cdx_reset_device(vdev);
diff --git a/drivers/vfio/cdx/vfio_cdx_intr.c b/drivers/vfio/cdx/vfio_cdx_intr.c
new file mode 100644
index 000000000000..20fe87bce464
--- /dev/null
+++ b/drivers/vfio/cdx/vfio_cdx_intr.c
@@ -0,0 +1,212 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ */
+
+#include <linux/vfio.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/eventfd.h>
+#include <linux/msi.h>
+#include <linux/interrupt.h>
+
+#include "linux/cdx/cdx_bus.h"
+#include "vfio_cdx_private.h"
+
+static irqreturn_t vfio_cdx_msihandler(int irq_no, void *arg)
+{
+ struct eventfd_ctx *trigger = arg;
+
+ eventfd_signal(trigger, 1);
+ return IRQ_HANDLED;
+}
+
+static int vfio_cdx_msi_enable(struct vfio_cdx_device *vdev, int nvec)
+{
+ struct device *dev = vdev->dev;
+ int msi_idx, ret;
+
+ vdev->cdx_irqs = kcalloc(nvec, sizeof(struct vfio_cdx_irq), GFP_KERNEL);
+ if (!vdev->cdx_irqs)
+ return -ENOMEM;
+
+ /* Allocate cdx MSIs */
+ ret = cdx_msi_domain_alloc_irqs(dev, nvec);
+ if (ret < 0) {
+ kfree(vdev->cdx_irqs);
+ return ret;
+ }
+
+ for (msi_idx = 0; msi_idx < nvec; msi_idx++)
+ vdev->cdx_irqs[msi_idx].irq_no = msi_get_virq(dev, msi_idx);
+
+ vdev->irq_count = nvec;
+ vdev->config_msi = 1;
+
+ return 0;
+}
+
+static int vfio_cdx_msi_set_vector_signal(struct vfio_cdx_device *vdev,
+ int vector, int fd)
+{
+ struct eventfd_ctx *trigger;
+ int irq_no, ret;
+
+ if (vector < 0 || vector >= vdev->irq_count)
+ return -EINVAL;
+
+ irq_no = vdev->cdx_irqs[vector].irq_no;
+
+ if (vdev->cdx_irqs[vector].trigger) {
+ free_irq(irq_no, vdev->cdx_irqs[vector].trigger);
+ kfree(vdev->cdx_irqs[vector].name);
+ eventfd_ctx_put(vdev->cdx_irqs[vector].trigger);
+ vdev->cdx_irqs[vector].trigger = NULL;
+ }
+
+ if (fd < 0)
+ return 0;
+
+ vdev->cdx_irqs[vector].name = kasprintf(GFP_KERNEL, "vfio-msi[%d](%s)",
+ vector, dev_name(vdev->dev));
+ if (!vdev->cdx_irqs[vector].name)
+ return -ENOMEM;
+
+ trigger = eventfd_ctx_fdget(fd);
+ if (IS_ERR(trigger)) {
+ kfree(vdev->cdx_irqs[vector].name);
+ return PTR_ERR(trigger);
+ }
+
+ ret = request_irq(irq_no, vfio_cdx_msihandler, 0,
+ vdev->cdx_irqs[vector].name, trigger);
+ if (ret) {
+ kfree(vdev->cdx_irqs[vector].name);
+ eventfd_ctx_put(trigger);
+ return ret;
+ }
+
+ vdev->cdx_irqs[vector].trigger = trigger;
+
+ return 0;
+}
+
+static int vfio_cdx_msi_set_block(struct vfio_cdx_device *vdev,
+ unsigned int start, unsigned int count,
+ int32_t *fds)
+{
+ int i, j, ret = 0;
+
+ if (start >= vdev->irq_count || start + count > vdev->irq_count)
+ return -EINVAL;
+
+ for (i = 0, j = start; i < count && !ret; i++, j++) {
+ int fd = fds ? fds[i] : -1;
+
+ ret = vfio_cdx_msi_set_vector_signal(vdev, j, fd);
+ }
+
+ if (ret) {
+ for (--j; j >= (int)start; j--)
+ vfio_cdx_msi_set_vector_signal(vdev, j, -1);
+ }
+
+ return ret;
+}
+
+static void vfio_cdx_msi_disable(struct vfio_cdx_device *vdev)
+{
+ struct device *dev = vdev->dev;
+
+ vfio_cdx_msi_set_block(vdev, 0, vdev->irq_count, NULL);
+
+ if (vdev->config_msi == 1)
+ cdx_msi_domain_free_irqs(dev);
+
+ vdev->config_msi = 0;
+ vdev->irq_count = 0;
+
+ kfree(vdev->cdx_irqs);
+}
+
+static int vfio_cdx_set_msi_trigger(struct vfio_cdx_device *vdev,
+ unsigned int index, unsigned int start,
+ unsigned int count, uint32_t flags,
+ void *data)
+{
+ struct cdx_device *cdx_dev = vdev->cdx_dev;
+ int i;
+
+ if (start + count > cdx_dev->num_msi)
+ return -EINVAL;
+
+ if (!count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
+ vfio_cdx_msi_disable(vdev);
+ return 0;
+ }
+
+ if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
+ s32 *fds = data;
+ int ret;
+
+ if (vdev->config_msi)
+ return vfio_cdx_msi_set_block(vdev, start, count,
+ fds);
+ ret = vfio_cdx_msi_enable(vdev, start + count);
+ if (ret)
+ return ret;
+
+ ret = vfio_cdx_msi_set_block(vdev, start, count, fds);
+ if (ret)
+ vfio_cdx_msi_disable(vdev);
+
+ return ret;
+ }
+
+ for (i = start; i < start + count; i++) {
+ if (!vdev->cdx_irqs[i].trigger)
+ continue;
+ if (flags & VFIO_IRQ_SET_DATA_NONE) {
+ eventfd_signal(vdev->cdx_irqs[i].trigger, 1);
+ } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
+ u8 *bools = data;
+
+ if (bools[i - start])
+ eventfd_signal(vdev->cdx_irqs[i].trigger, 1);
+ }
+ }
+
+ return 0;
+}
+
+int vfio_cdx_set_irqs_ioctl(struct vfio_cdx_device *vdev,
+ u32 flags, unsigned int index,
+ unsigned int start, unsigned int count,
+ void *data)
+{
+ if (flags & VFIO_IRQ_SET_ACTION_TRIGGER)
+ return vfio_cdx_set_msi_trigger(vdev, index, start,
+ count, flags, data);
+ else
+ return -EINVAL;
+}
+
+/* Free All IRQs for the given device */
+void vfio_cdx_irqs_cleanup(struct vfio_cdx_device *vdev)
+{
+ /*
+ * Device does not support any interrupt or the interrupts
+ * were not configured
+ */
+ if (!vdev->cdx_irqs)
+ return;
+
+ vfio_cdx_set_msi_trigger(vdev, 1, 0, 0,
+ VFIO_IRQ_SET_DATA_NONE, NULL);
+
+ if (vdev->config_msi) {
+ cdx_msi_domain_free_irqs(vdev->dev);
+ kfree(vdev->cdx_irqs);
+ }
+ vdev->cdx_irqs = NULL;
+}
diff --git a/drivers/vfio/cdx/vfio_cdx_private.h b/drivers/vfio/cdx/vfio_cdx_private.h
index d87b55663462..9f93fc8cabfd 100644
--- a/drivers/vfio/cdx/vfio_cdx_private.h
+++ b/drivers/vfio/cdx/vfio_cdx_private.h
@@ -14,6 +14,14 @@
#define VFIO_CDX_INDEX_TO_OFFSET(index) \
((u64)(index) << VFIO_CDX_OFFSET_SHIFT)
+struct vfio_cdx_irq {
+ u32 flags;
+ u32 count;
+ int irq_no;
+ struct eventfd_ctx *trigger;
+ char *name;
+};
+
struct vfio_cdx_region {
u32 flags;
u32 type;
@@ -27,6 +35,16 @@ struct vfio_cdx_device {
struct cdx_device *cdx_dev;
struct device *dev;
struct vfio_cdx_region *regions;
+ struct vfio_cdx_irq *cdx_irqs;
+ uint32_t irq_count;
+ uint32_t config_msi;
};
+int vfio_cdx_set_irqs_ioctl(struct vfio_cdx_device *vdev,
+ u32 flags, unsigned int index,
+ unsigned int start, unsigned int count,
+ void *data);
+
+void vfio_cdx_irqs_cleanup(struct vfio_cdx_device *vdev);
+
#endif /* VFIO_CDX_PRIVATE_H */
--
2.25.1
next prev parent reply other threads:[~2022-09-06 14:20 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20220803122655.100254-1-nipun.gupta@amd.com>
2022-08-17 15:05 ` [RFC PATCH v2 0/6] add support for CDX bus controller Nipun Gupta
2022-08-17 15:05 ` [RFC PATCH v2 1/6] Documentation: DT: Add entry for CDX controller Nipun Gupta
2022-08-18 9:54 ` Krzysztof Kozlowski
2022-08-18 9:59 ` Krzysztof Kozlowski
2022-09-05 14:05 ` Gupta, Nipun
2022-09-06 6:55 ` Krzysztof Kozlowski
2022-09-06 7:03 ` Gupta, Nipun
2022-09-06 7:20 ` Krzysztof Kozlowski
2022-08-17 15:05 ` [RFC PATCH v2 2/6] bus/cdx: add the cdx bus driver Nipun Gupta
2022-08-17 15:32 ` Greg KH
2022-08-17 15:46 ` Marc Zyngier
2022-08-22 13:21 ` Gupta, Nipun
2022-08-22 13:29 ` Greg KH
2022-08-24 8:50 ` Gupta, Nipun
2022-08-24 12:11 ` Greg KH
2022-08-24 23:31 ` Jason Gunthorpe
2022-08-25 18:38 ` Saravana Kannan
2022-08-25 19:57 ` Robin Murphy
2022-08-26 0:08 ` Jason Gunthorpe
2022-08-29 4:49 ` Gupta, Nipun
2022-08-29 4:49 ` Gupta, Nipun
2022-08-29 15:31 ` Jason Gunthorpe
2022-08-30 7:06 ` Gupta, Nipun
2022-08-30 11:25 ` Robin Murphy
2022-08-30 13:01 ` Jason Gunthorpe
2022-08-30 13:12 ` Gupta, Nipun
2022-08-17 15:05 ` [RFC PATCH v2 3/6] bus/cdx: add cdx-MSI domain with gic-its domain as parent Nipun Gupta
2022-08-17 15:33 ` Greg KH
2022-08-17 15:05 ` [RFC PATCH v2 4/6] bus/cdx: add rescan and reset support Nipun Gupta
2022-08-17 15:05 ` [RFC PATCH v2 5/6] vfio: platform: reset: add reset for cdx devices Nipun Gupta
2022-08-17 15:05 ` [RFC PATCH v2 6/6] driver core: add compatible string in sysfs for platform devices Nipun Gupta
2022-08-17 15:30 ` Greg KH
2022-08-17 16:04 ` Saravana Kannan
2022-09-05 13:54 ` Gupta, Nipun
2022-09-06 13:47 ` [RFC PATCH v3 0/7] add support for CDX bus Nipun Gupta
2022-09-06 13:47 ` [RFC PATCH v3 1/7] dt-bindings: bus: add CDX bus device tree bindings Nipun Gupta
2022-09-06 17:46 ` Rob Herring
2022-09-07 3:13 ` Gupta, Nipun
2022-09-08 10:51 ` Krzysztof Kozlowski
2022-09-06 13:47 ` [RFC PATCH v3 2/7] bus/cdx: add the cdx bus driver Nipun Gupta
2022-09-07 0:32 ` Saravana Kannan
2022-09-07 3:21 ` Gupta, Nipun
2022-09-07 18:06 ` Saravana Kannan
2022-09-07 12:32 ` Greg KH
2022-09-08 13:29 ` Gupta, Nipun
2022-09-06 13:47 ` [RFC PATCH v3 3/7] iommu/arm-smmu-v3: support ops registration for CDX bus Nipun Gupta
2022-09-07 0:10 ` Saravana Kannan
2022-09-07 3:17 ` Gupta, Nipun
2022-09-07 8:27 ` Robin Murphy
2022-09-07 18:24 ` Saravana Kannan
2022-09-07 20:40 ` Robin Murphy
2022-09-08 0:14 ` Saravana Kannan
2022-09-06 13:47 ` [RFC PATCH v3 4/7] bus/cdx: add cdx-MSI domain with gic-its domain as parent Nipun Gupta
2022-09-06 17:19 ` Jason Gunthorpe
2022-09-07 11:17 ` Marc Zyngier
2022-09-07 11:33 ` Robin Murphy
2022-09-07 12:14 ` Marc Zyngier
2022-09-07 11:35 ` Radovanovic, Aleksandar
[not found] ` <87illzuzyw.wl-maz@kernel.org>
2022-09-07 13:18 ` Radovanovic, Aleksandar
[not found] ` <87edwmuw4f.wl-maz@kernel.org>
2022-09-08 9:51 ` Radovanovic, Aleksandar
2022-09-08 11:49 ` Robin Murphy
2022-09-07 13:18 ` Marc Zyngier
2022-09-08 14:13 ` Gupta, Nipun
[not found] ` <87a67aueg7.wl-maz@kernel.org>
2022-09-09 6:32 ` Gupta, Nipun
2022-10-12 10:04 ` Gupta, Nipun
2022-10-12 10:34 ` Radovanovic, Aleksandar
2022-10-12 13:02 ` Jason Gunthorpe
2022-10-12 13:37 ` Radovanovic, Aleksandar
2022-10-12 14:38 ` Jason Gunthorpe
2022-10-12 15:09 ` Radovanovic, Aleksandar
2022-10-13 12:43 ` Jason Gunthorpe
2022-10-14 11:18 ` Radovanovic, Aleksandar
2022-10-14 11:54 ` gregkh
2022-10-14 12:13 ` Radovanovic, Aleksandar
2022-10-14 13:46 ` gregkh
2022-10-14 13:58 ` Jason Gunthorpe
2022-09-06 13:47 ` [RFC PATCH v3 5/7] bus/cdx: add bus and device attributes Nipun Gupta
2022-09-06 13:48 ` [RFC PATCH v3 6/7] vfio/cdx: add support for CDX bus Nipun Gupta
2022-09-06 17:20 ` Jason Gunthorpe
2022-09-06 17:23 ` Gupta, Nipun
2022-09-06 13:48 ` Nipun Gupta [this message]
2022-10-14 4:40 ` [RFC PATCH v4 0/8] " Nipun Gupta
2022-10-14 4:40 ` [RFC PATCH v4 1/8] dt-bindings: bus: add CDX bus device tree bindings Nipun Gupta
2022-10-14 14:17 ` Rob Herring
2022-10-17 10:18 ` Gupta, Nipun
2022-10-14 4:40 ` [RFC PATCH v4 2/8] bus/cdx: add the cdx bus driver Nipun Gupta
2022-10-14 7:15 ` Greg KH
2022-10-14 8:12 ` Gupta, Nipun
2022-10-14 7:18 ` Greg KH
2022-10-14 8:20 ` Gupta, Nipun
2022-10-14 4:40 ` [RFC PATCH v4 3/8] iommu/arm-smmu-v3: support ops registration for CDX bus Nipun Gupta
2022-10-14 4:51 ` Gupta, Nipun
2022-10-14 4:40 ` [RFC PATCH v4 4/8] bux/cdx: support dma configuration for CDX devices Nipun Gupta
2022-10-14 4:40 ` [RFC PATCH v4 5/8] bus/cdx: add bus and device attributes Nipun Gupta
2022-10-14 4:40 ` [RFC PATCH v4 6/8] irq/msi: use implicit msi domain for alloc and free Nipun Gupta
2022-10-14 4:40 ` [RFC PATCH v4 7/8] bus/cdx: add cdx-MSI domain with gic-its domain as parent Nipun Gupta
2022-11-17 19:10 ` Thomas Gleixner
2022-10-14 4:40 ` [RFC PATCH v4 8/8] bus/cdx: add cdx controller Nipun Gupta
2022-10-14 14:10 ` [RFC PATCH v4 0/8] add support for CDX bus Rob Herring
2022-10-17 10:08 ` Gupta, Nipun
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