From: Rob Herring <robh@kernel.org>
To: Johan Jonker <jbx6244@gmail.com>
Cc: heiko@sntech.de, zhangqing@rock-chips.com,
krzysztof.kozlowski+dt@linaro.org, sboyd@kernel.org,
mturquette@baylibre.com, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML
Date: Tue, 13 Sep 2022 10:32:45 -0500 [thread overview]
Message-ID: <20220913153245.GA3769654-robh@kernel.org> (raw)
In-Reply-To: <76d87f49-6a44-0a05-c9dc-af870fade924@gmail.com>
On Sun, Sep 11, 2022 at 11:20:10PM +0200, Johan Jonker wrote:
> Convert rockchip,rk3128-cru.txt to YAML.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> .../bindings/clock/rockchip,rk3128-cru.txt | 58 ---------------
> .../bindings/clock/rockchip,rk3128-cru.yaml | 73 +++++++++++++++++++
> 2 files changed, 73 insertions(+), 58 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> deleted file mode 100644
> index 6f8744fd3..000000000
> --- a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> +++ /dev/null
> @@ -1,58 +0,0 @@
> -* Rockchip RK3126/RK3128 Clock and Reset Unit
> -
> -The RK3126/RK3128 clock controller generates and supplies clock to various
> -controllers within the SoC and also implements a reset controller for SoC
> -peripherals.
> -
> -Required Properties:
> -
> -- compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"
> - "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.
> - "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.
> -- reg: physical base address of the controller and length of memory mapped
> - region.
> -- #clock-cells: should be 1.
> -- #reset-cells: should be 1.
> -
> -Optional Properties:
> -
> -- rockchip,grf: phandle to the syscon managing the "general register files"
> - If missing pll rates are not changeable, due to the missing pll lock status.
> -
> -Each clock is assigned an identifier and client nodes can use this identifier
> -to specify the clock which they consume. All available clocks are defined as
> -preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
> -used in device tree sources. Similar macros exist for the reset sources in
> -these files.
> -
> -External clocks:
> -
> -There are several clocks that are generated outside the SoC. It is expected
> -that they are defined using standard clock bindings with following
> -clock-output-names:
> - - "xin24m" - crystal input - required,
> - - "ext_i2s" - external I2S clock - optional,
> - - "gmac_clkin" - external GMAC clock - optional
> -
> -Example: Clock controller node:
> -
> - cru: cru@20000000 {
> - compatible = "rockchip,rk3128-cru";
> - reg = <0x20000000 0x1000>;
> - rockchip,grf = <&grf>;
> -
> - #clock-cells = <1>;
> - #reset-cells = <1>;
> - };
> -
> -Example: UART controller node that consumes the clock generated by the clock
> - controller:
> -
> - uart2: serial@20068000 {
> - compatible = "rockchip,serial";
> - reg = <0x20068000 0x100>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <24000000>;
> - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
> - clock-names = "sclk_uart", "pclk_uart";
> - };
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
> new file mode 100644
> index 000000000..03e5d7f0e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU)
> +
> +maintainers:
> + - Elaine Zhang <zhangqing@rock-chips.com>
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +description: |
> + The RK3126/RK3128 clock controller generates and supplies clock to various
> + controllers within the SoC and also implements a reset controller for SoC
> + peripherals.
> + Each clock is assigned an identifier and client nodes can use this identifier
> + to specify the clock which they consume. All available clocks are defined as
> + preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
> + used in device tree sources. Similar macros exist for the reset sources in
> + these files.
> + There are several clocks that are generated outside the SoC. It is expected
> + that they are defined using standard clock bindings with following
> + clock-output-names:
Which node does clock-output-names live in?
From the description, it sounds more like this should be
clocks/clock-names.
> + - "xin24m" - crystal input - required
> + - "ext_i2s" - external I2S clock - optional
> + - "gmac_clkin" - external GMAC clock - optional
prev parent reply other threads:[~2022-09-13 16:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-11 21:20 [PATCH v1] dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML Johan Jonker
2022-09-12 10:51 ` Krzysztof Kozlowski
2022-09-14 9:25 ` Johan Jonker
2022-09-17 6:56 ` Heiko Stuebner
2022-09-13 15:32 ` Rob Herring [this message]
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