From: Li Yang <leoyang.li@nxp.com>
To: shawnguo@kernel.org, devicetree@vger.kernel.org
Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Po Liu <po.liu@nxp.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCH v2 03/11] arm64: dts: ls1043a: use pcie aer/pme interrupts
Date: Wed, 14 Sep 2022 16:46:55 -0500 [thread overview]
Message-ID: <20220914214703.29706-4-leoyang.li@nxp.com> (raw)
In-Reply-To: <20220914214703.29706-1-leoyang.li@nxp.com>
After the binding has been updated to include more specific interrupt
definition, update the dts to use the more specific interrupt names.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3ba66b18de35..d04d4ac66d2a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -883,9 +883,9 @@ pcie1: pcie@3400000 {
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 118 0x4>, /* controller interrupt */
- <0 117 0x4>; /* PME interrupt */
- interrupt-names = "intr", "pme";
+ interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>,
+ <0 118 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -909,9 +909,9 @@ pcie2: pcie@3500000 {
reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
<0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 128 0x4>,
- <0 127 0x4>;
- interrupt-names = "intr", "pme";
+ interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>,
+ <0 128 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -935,9 +935,9 @@ pcie3: pcie@3600000 {
reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
<0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 162 0x4>,
- <0 161 0x4>;
- interrupt-names = "intr", "pme";
+ interrupts = <0 161 IRQ_TYPE_LEVEL_HIGH>,
+ <0 162 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
--
2.37.1
next prev parent reply other threads:[~2022-09-14 21:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-14 21:46 [PATCH v2 00/11] accumulated dts updates for ls1043a Li Yang
2022-09-14 21:46 ` [PATCH v2 01/11] arm64: dts: ls1043a: fix the wrong size of dcfg space Li Yang
2022-09-14 21:46 ` [PATCH v2 02/11] arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node Li Yang
2022-09-14 21:46 ` Li Yang [this message]
2022-09-14 21:46 ` [PATCH v2 04/11] arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes Li Yang
2022-09-14 21:46 ` [PATCH v2 05/11] arm64: dts: ls1043a: Add big-endian property " Li Yang
2022-09-14 21:46 ` [PATCH v2 06/11] arm64: dts: ls1043a: add missing dma ranges property Li Yang
2022-09-14 21:46 ` [PATCH v2 07/11] arm64: dts: ls1043a: make dma-coherent global to the SoC Li Yang
2022-09-14 21:47 ` [PATCH v2 08/11] arm64: dts: ls1043a: add gpio based i2c recovery information Li Yang
2022-09-14 21:47 ` [PATCH v2 09/11] arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size Li Yang
2022-09-14 21:47 ` [PATCH v2 10/11] arm64: dts: ls1043a-qds: add mmio based mdio-mux support Li Yang
2022-09-14 21:47 ` [PATCH v2 11/11] arm64: dts: ls1043a-rdb: add pcf85263 rtc node Li Yang
2022-09-16 12:12 ` [PATCH v2 00/11] accumulated dts updates for ls1043a Shawn Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220914214703.29706-4-leoyang.li@nxp.com \
--to=leoyang.li@nxp.com \
--cc=Zhiqiang.Hou@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=po.liu@nxp.com \
--cc=robh+dt@kernel.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).