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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id g25-20020a9d5f99000000b006540dd3daa8sm710535oti.51.2022.09.16.11.47.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 11:47:41 -0700 (PDT) Received: (nullmailer pid 1059563 invoked by uid 1000); Fri, 16 Sep 2022 18:47:41 -0000 Date: Fri, 16 Sep 2022 13:47:41 -0500 From: Rob Herring To: Krzysztof Kozlowski Cc: Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , Bjorn Helgaas , Krzysztof Kozlowski , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: Re: [PATCH] dt-bindings: pci: qcom,pcie-ep: correct qcom,perst-regs Message-ID: <20220916184741.GA1057850-robh@kernel.org> References: <20220911135547.23106-1-krzysztof.kozlowski@linaro.org> <11e61fa5-f770-9c9f-23b9-3d1dcb205bc5@linaro.org> <20220913152054.GA3736444-robh@kernel.org> <20220914014701.GA853152-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220914014701.GA853152-robh@kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Sep 13, 2022 at 08:47:01PM -0500, Rob Herring wrote: > On Tue, Sep 13, 2022 at 06:25:49PM +0200, Krzysztof Kozlowski wrote: > > On 13/09/2022 17:20, Rob Herring wrote: > > > On Sun, Sep 11, 2022 at 04:14:54PM +0200, Krzysztof Kozlowski wrote: > > >> On 11/09/2022 15:55, Krzysztof Kozlowski wrote: > > >>> qcom,perst-regs is an phandle array of one item with a phandle and its > > >>> arguments. > > >>> > > >>> Signed-off-by: Krzysztof Kozlowski > > >>> --- > > >>> Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 ++++-- > > >>> 1 file changed, 4 insertions(+), 2 deletions(-) > > >>> > > >>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > >>> index 3d23599e5e91..077e002b07d3 100644 > > >>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > >>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > >>> @@ -60,8 +60,10 @@ properties: > > >>> enable registers > > >>> $ref: "/schemas/types.yaml#/definitions/phandle-array" > > >>> items: > > >>> - minItems: 3 > > >>> - maxItems: 3 > > >>> + - items: > > >>> + - description: Syscon to TCSR system registers > > >>> + - description: Perst enable offset > > >>> + - description: Perst separateion enable offset > > >> > > >> Unfortunately this still complains: > > >> > > >> qcom-sdx55-t55.dtb: pcie-ep@40000000: qcom,perst-regs:0: [28] is too short > > >> > > >> > > >> where 28 is the phandle... > > > > > > Meaning the dt is wrong or there's a tooling issue? > > > > I think tooling issue. I looked at this many times and code (schema and > > DTS) seems to be correct, but tool doesn't like it. > > Okay, I found the issue. Will test it a bit more and apply it tomorrow. This and some other cases are now fixed. There's a new release, v2022.09. Rob