From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8198FECAAD8 for ; Tue, 20 Sep 2022 09:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229918AbiITJrc (ORCPT ); Tue, 20 Sep 2022 05:47:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229793AbiITJr3 (ORCPT ); Tue, 20 Sep 2022 05:47:29 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DFD46B17A; Tue, 20 Sep 2022 02:47:27 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28K9lK1p130882; Tue, 20 Sep 2022 04:47:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663667240; bh=POgT0Haj8aR/wdoFVLwqhaXg30Bo+xti1sNh1Wld6Oc=; h=From:To:CC:Subject:Date; b=wxKq3GGoL2yBHfeiqDuV+rl7Vp/faRyIIze54MpmBIQLo/4J8wPbEpw1hpdM4DAYE xalVzK0P9LuQJKlgVg9S+O66t8wDB7VZUa9BqJngaE76QU1y/OR74GsuGW/oqemLhQ V8cNfLoyg1A7ws5TAihNbaWuAx+vLWPQPoJ92Y4U= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28K9lKdV024165 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Sep 2022 04:47:20 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 20 Sep 2022 04:47:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 20 Sep 2022 04:47:19 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28K9lIdr100353; Tue, 20 Sep 2022 04:47:19 -0500 From: Rahul T R To: CC: , , , , , , , , Subject: [PATCH v5 0/2] Enable RPi header on j721e sk Date: Tue, 20 Sep 2022 15:17:11 +0530 Message-ID: <20220920094713.18950-1-r-ravikumar@ti.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The following series of patches enables RPi header on j721e sk. It is a 40 pin io expasion header which brings out i2c5, ehrpwm 2,3 and some pins of gpio 0,1 v5: - Enable only gpio's and i2c on the RPi Header as per the discussion in the v4 v4: - Correct the node name in dt binding example v3: - Change node name from clock to clock-controller - Add correct description for clock-controller node v2: - Add full path for clock property $ref - Remove the discription for clock pattern property, since $ref is added - Remove the label in the example - Fix the indentation in the example Sinthu Raja (1): arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header Vijay Pothukuchi (1): arm64: dts: ti: k3-j721e-*: Add dts nodes for EHRPWMs .../dts/ti/k3-j721e-common-proc-board.dts | 24 ++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 62 ++++++++++++++- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 79 ++++++++++++++++++- 3 files changed, 163 insertions(+), 2 deletions(-) -- 2.37.3