* [PATCH v3 0/2] drm/msm/dsi: Add support for DSI PHY on QCM2290
@ 2022-09-24 12:18 Dmitry Baryshkov
2022-09-24 12:18 ` [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy Dmitry Baryshkov
2022-09-24 12:19 ` [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 Dmitry Baryshkov
0 siblings, 2 replies; 8+ messages in thread
From: Dmitry Baryshkov @ 2022-09-24 12:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
The QCM2290 platform uses 14nm DSI PHY. As the configuration is not
fully compatible with the main qcom,dsi-phy-14nm, a separate compatible
is added.
Changes since v2:
- Changed compatible back to qcom,dsi-phy-14nm-2290
Changes since v1:
- Rebased on top of msm-next, fixed DSI PHY config to follow upstream
changes.
- Changed compatible to follow agreed scheme
('qcom,qcm2290-dsi-phy-14nm').
- Updated commit messages.
Loic Poulain (2):
dt-bindings: display/msm: Add QCM2290 DSI phy
drm/msm/dsi: Add phy configuration for QCM2290
.../bindings/display/msm/dsi-phy-14nm.yaml | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++
4 files changed, 21 insertions(+)
--
2.35.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy 2022-09-24 12:18 [PATCH v3 0/2] drm/msm/dsi: Add support for DSI PHY on QCM2290 Dmitry Baryshkov @ 2022-09-24 12:18 ` Dmitry Baryshkov 2022-09-26 23:18 ` Rob Herring 2022-09-24 12:19 ` [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 Dmitry Baryshkov 1 sibling, 1 reply; 8+ messages in thread From: Dmitry Baryshkov @ 2022-09-24 12:18 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain From: Loic Poulain <loic.poulain@linaro.org> QCM2290 platform uses the 14nm DSI PHY driver. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml index bc3d0b4063c7..054d8f65d9fa 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml @@ -15,6 +15,7 @@ properties: compatible: enum: - qcom,dsi-phy-14nm + - qcom,dsi-phy-14nm-2290 - qcom,dsi-phy-14nm-660 - qcom,dsi-phy-14nm-8953 -- 2.35.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy 2022-09-24 12:18 ` [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy Dmitry Baryshkov @ 2022-09-26 23:18 ` Rob Herring 0 siblings, 0 replies; 8+ messages in thread From: Rob Herring @ 2022-09-26 23:18 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Krzysztof Kozlowski, Rob Clark, Stephen Boyd, Konrad Dybcio, dri-devel, Bjorn Andersson, Loic Poulain, Daniel Vetter, Andy Gross, Abhinav Kumar, devicetree, David Airlie, linux-arm-msm, freedreno, Rob Herring, Sean Paul On Sat, 24 Sep 2022 15:18:59 +0300, Dmitry Baryshkov wrote: > From: Loic Poulain <loic.poulain@linaro.org> > > QCM2290 platform uses the 14nm DSI PHY driver. > > Signed-off-by: Loic Poulain <loic.poulain@linaro.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 2022-09-24 12:18 [PATCH v3 0/2] drm/msm/dsi: Add support for DSI PHY on QCM2290 Dmitry Baryshkov 2022-09-24 12:18 ` [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy Dmitry Baryshkov @ 2022-09-24 12:19 ` Dmitry Baryshkov 2022-09-24 14:48 ` Konrad Dybcio 2022-10-01 16:00 ` Marijn Suijten 1 sibling, 2 replies; 8+ messages in thread From: Dmitry Baryshkov @ 2022-09-24 12:19 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain From: Loic Poulain <loic.poulain@linaro.org> The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not fully compatible with the standard 14nm PHY, so it requires a separate compatible and config entry. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> [DB: rebased and updated commit msg] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c index 7fc0975cb869..ee6051367679 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -549,6 +549,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { #ifdef CONFIG_DRM_MSM_DSI_14NM_PHY { .compatible = "qcom,dsi-phy-14nm", .data = &dsi_phy_14nm_cfgs }, + { .compatible = "qcom,dsi-phy-14nm-2290", + .data = &dsi_phy_14nm_2290_cfgs }, { .compatible = "qcom,dsi-phy-14nm-660", .data = &dsi_phy_14nm_660_cfgs }, { .compatible = "qcom,dsi-phy-14nm-8953", diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h index 60a99c6525b2..1096afedd616 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -50,6 +50,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; +extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c index 0f8f4ca46429..9f488adea7f5 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -1081,3 +1081,20 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = { .io_start = { 0x1a94400, 0x1a96400 }, .num_dsi_phy = 2, }; + +const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = { + .has_phy_lane = true, + .regulator_data = dsi_phy_14nm_17mA_regulators, + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), + .ops = { + .enable = dsi_14nm_phy_enable, + .disable = dsi_14nm_phy_disable, + .pll_init = dsi_pll_14nm_init, + .save_pll_state = dsi_14nm_pll_save_state, + .restore_pll_state = dsi_14nm_pll_restore_state, + }, + .min_pll_rate = VCO_MIN_RATE, + .max_pll_rate = VCO_MAX_RATE, + .io_start = { 0x5e94400 }, + .num_dsi_phy = 1, +}; -- 2.35.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 2022-09-24 12:19 ` [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 Dmitry Baryshkov @ 2022-09-24 14:48 ` Konrad Dybcio 2022-10-01 16:00 ` Marijn Suijten 1 sibling, 0 replies; 8+ messages in thread From: Konrad Dybcio @ 2022-09-24 14:48 UTC (permalink / raw) To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain On 24.09.2022 14:19, Dmitry Baryshkov wrote: > From: Loic Poulain <loic.poulain@linaro.org> > > The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not > fully compatible with the standard 14nm PHY, so it requires a separate > compatible and config entry. > > Signed-off-by: Loic Poulain <loic.poulain@linaro.org> > [DB: rebased and updated commit msg] > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> (sorry I didn't notice earlier that there was a v2) Konrad > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ > drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++ > 3 files changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > index 7fc0975cb869..ee6051367679 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > @@ -549,6 +549,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { > #ifdef CONFIG_DRM_MSM_DSI_14NM_PHY > { .compatible = "qcom,dsi-phy-14nm", > .data = &dsi_phy_14nm_cfgs }, > + { .compatible = "qcom,dsi-phy-14nm-2290", > + .data = &dsi_phy_14nm_2290_cfgs }, > { .compatible = "qcom,dsi-phy-14nm-660", > .data = &dsi_phy_14nm_660_cfgs }, > { .compatible = "qcom,dsi-phy-14nm-8953", > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > index 60a99c6525b2..1096afedd616 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > @@ -50,6 +50,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; > +extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > index 0f8f4ca46429..9f488adea7f5 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > @@ -1081,3 +1081,20 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = { > .io_start = { 0x1a94400, 0x1a96400 }, > .num_dsi_phy = 2, > }; > + > +const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = { > + .has_phy_lane = true, > + .regulator_data = dsi_phy_14nm_17mA_regulators, > + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), > + .ops = { > + .enable = dsi_14nm_phy_enable, > + .disable = dsi_14nm_phy_disable, > + .pll_init = dsi_pll_14nm_init, > + .save_pll_state = dsi_14nm_pll_save_state, > + .restore_pll_state = dsi_14nm_pll_restore_state, > + }, > + .min_pll_rate = VCO_MIN_RATE, > + .max_pll_rate = VCO_MAX_RATE, > + .io_start = { 0x5e94400 }, > + .num_dsi_phy = 1, > +}; ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 2022-09-24 12:19 ` [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 Dmitry Baryshkov 2022-09-24 14:48 ` Konrad Dybcio @ 2022-10-01 16:00 ` Marijn Suijten 2022-10-04 14:29 ` Dmitry Baryshkov 1 sibling, 1 reply; 8+ messages in thread From: Marijn Suijten @ 2022-10-01 16:00 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain On 2022-09-24 15:19:00, Dmitry Baryshkov wrote: > From: Loic Poulain <loic.poulain@linaro.org> > > The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not > fully compatible with the standard 14nm PHY, so it requires a separate > compatible and config entry. > > Signed-off-by: Loic Poulain <loic.poulain@linaro.org> > [DB: rebased and updated commit msg] > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ > drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++ > 3 files changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > index 7fc0975cb869..ee6051367679 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > @@ -549,6 +549,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { > #ifdef CONFIG_DRM_MSM_DSI_14NM_PHY > { .compatible = "qcom,dsi-phy-14nm", > .data = &dsi_phy_14nm_cfgs }, > + { .compatible = "qcom,dsi-phy-14nm-2290", > + .data = &dsi_phy_14nm_2290_cfgs }, > { .compatible = "qcom,dsi-phy-14nm-660", > .data = &dsi_phy_14nm_660_cfgs }, > { .compatible = "qcom,dsi-phy-14nm-8953", > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > index 60a99c6525b2..1096afedd616 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > @@ -50,6 +50,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; > +extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; following alphabetical sorting (same as the other locations in this series), this should be above 660? > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > index 0f8f4ca46429..9f488adea7f5 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > @@ -1081,3 +1081,20 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = { > .io_start = { 0x1a94400, 0x1a96400 }, > .num_dsi_phy = 2, > }; > + > +const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = { > + .has_phy_lane = true, > + .regulator_data = dsi_phy_14nm_17mA_regulators, > + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), > + .ops = { > + .enable = dsi_14nm_phy_enable, > + .disable = dsi_14nm_phy_disable, > + .pll_init = dsi_pll_14nm_init, > + .save_pll_state = dsi_14nm_pll_save_state, > + .restore_pll_state = dsi_14nm_pll_restore_state, > + }, > + .min_pll_rate = VCO_MIN_RATE, > + .max_pll_rate = VCO_MAX_RATE, > + .io_start = { 0x5e94400 }, For sm6125 we also need this exact io_start (and a single PHY), do you think it makes sense to add a compatible that reuses the same struct (I can do that in a folloup patch) and/or generalize this struct (name)? However, our regulator setup appears to be different. I recall not finding any `vcca` supply in my downstream sources, and had this in my notes for a similar dsi_phy_14nm.c patch: sm6125 uses an RPM regulator https://github.com/sonyxperiadev/kernel/blob/f956fbd9a234033bd18234d456a2c32c126b38f3/arch/arm64/boot/dts/qcom/trinket-sde.dtsi#L388 - Marijn > + .num_dsi_phy = 1, > +}; > -- > 2.35.1 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 2022-10-01 16:00 ` Marijn Suijten @ 2022-10-04 14:29 ` Dmitry Baryshkov 2022-10-04 23:04 ` Marijn Suijten 0 siblings, 1 reply; 8+ messages in thread From: Dmitry Baryshkov @ 2022-10-04 14:29 UTC (permalink / raw) To: Marijn Suijten Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain On Sat, 1 Oct 2022 at 19:00, Marijn Suijten <marijn.suijten@somainline.org> wrote: > > On 2022-09-24 15:19:00, Dmitry Baryshkov wrote: > > From: Loic Poulain <loic.poulain@linaro.org> > > > > The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not > > fully compatible with the standard 14nm PHY, so it requires a separate > > compatible and config entry. > > > > Signed-off-by: Loic Poulain <loic.poulain@linaro.org> > > [DB: rebased and updated commit msg] > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ > > drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + > > drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++ > > 3 files changed, 20 insertions(+) > > > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > > index 7fc0975cb869..ee6051367679 100644 > > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > > @@ -549,6 +549,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { > > #ifdef CONFIG_DRM_MSM_DSI_14NM_PHY > > { .compatible = "qcom,dsi-phy-14nm", > > .data = &dsi_phy_14nm_cfgs }, > > + { .compatible = "qcom,dsi-phy-14nm-2290", > > + .data = &dsi_phy_14nm_2290_cfgs }, > > { .compatible = "qcom,dsi-phy-14nm-660", > > .data = &dsi_phy_14nm_660_cfgs }, > > { .compatible = "qcom,dsi-phy-14nm-8953", > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > > index 60a99c6525b2..1096afedd616 100644 > > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h > > @@ -50,6 +50,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; > > extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; > > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; > > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; > > +extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; > > following alphabetical sorting (same as the other locations in this > series), this should be above 660? Ack > > > extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs; > > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; > > extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > > index 0f8f4ca46429..9f488adea7f5 100644 > > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c > > @@ -1081,3 +1081,20 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = { > > .io_start = { 0x1a94400, 0x1a96400 }, > > .num_dsi_phy = 2, > > }; > > + > > +const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = { > > + .has_phy_lane = true, > > + .regulator_data = dsi_phy_14nm_17mA_regulators, > > + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), > > + .ops = { > > + .enable = dsi_14nm_phy_enable, > > + .disable = dsi_14nm_phy_disable, > > + .pll_init = dsi_pll_14nm_init, > > + .save_pll_state = dsi_14nm_pll_save_state, > > + .restore_pll_state = dsi_14nm_pll_restore_state, > > + }, > > + .min_pll_rate = VCO_MIN_RATE, > > + .max_pll_rate = VCO_MAX_RATE, > > + .io_start = { 0x5e94400 }, > > For sm6125 we also need this exact io_start (and a single PHY), do you > think it makes sense to add a compatible that reuses the same struct (I > can do that in a folloup patch) and/or generalize this struct (name)? > > However, our regulator setup appears to be different. I recall not > finding any `vcca` supply in my downstream sources, and had this in my > notes for a similar dsi_phy_14nm.c patch: > > sm6125 uses an RPM regulator > > https://github.com/sonyxperiadev/kernel/blob/f956fbd9a234033bd18234d456a2c32c126b38f3/arch/arm64/boot/dts/qcom/trinket-sde.dtsi#L388 I'd prefer a separate config for sm6125. This way you would be able to add voting on the MX domain if required. -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 2022-10-04 14:29 ` Dmitry Baryshkov @ 2022-10-04 23:04 ` Marijn Suijten 0 siblings, 0 replies; 8+ messages in thread From: Marijn Suijten @ 2022-10-04 23:04 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul, Abhinav Kumar, Rob Herring, Krzysztof Kozlowski, Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm, devicetree, dri-devel, freedreno, Loic Poulain On 2022-10-04 17:29:32, Dmitry Baryshkov wrote: > On Sat, 1 Oct 2022 at 19:00, Marijn Suijten > <marijn.suijten@somainline.org> wrote: > > [..] > > For sm6125 we also need this exact io_start (and a single PHY), do you > > think it makes sense to add a compatible that reuses the same struct (I > > can do that in a folloup patch) and/or generalize this struct (name)? > > > > However, our regulator setup appears to be different. I recall not > > finding any `vcca` supply in my downstream sources, and had this in my > > notes for a similar dsi_phy_14nm.c patch: > > > > sm6125 uses an RPM regulator > > > > https://github.com/sonyxperiadev/kernel/blob/f956fbd9a234033bd18234d456a2c32c126b38f3/arch/arm64/boot/dts/qcom/trinket-sde.dtsi#L388 > > I'd prefer a separate config for sm6125. This way you would be able to > add voting on the MX domain if required. Ack, I'll queue up a patch series for this SoC, with a dt-bindings patch that makes the vcca register optional for the sm6125 compatible. - Marijn ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-10-04 23:05 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-09-24 12:18 [PATCH v3 0/2] drm/msm/dsi: Add support for DSI PHY on QCM2290 Dmitry Baryshkov 2022-09-24 12:18 ` [PATCH v3 1/2] dt-bindings: display/msm: Add QCM2290 DSI phy Dmitry Baryshkov 2022-09-26 23:18 ` Rob Herring 2022-09-24 12:19 ` [PATCH v3 2/2] drm/msm/dsi: Add phy configuration for QCM2290 Dmitry Baryshkov 2022-09-24 14:48 ` Konrad Dybcio 2022-10-01 16:00 ` Marijn Suijten 2022-10-04 14:29 ` Dmitry Baryshkov 2022-10-04 23:04 ` Marijn Suijten
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