[PATCH v3] dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML

[PATCH v3] dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML

[Sergio Paracuellos]

MIPS CPU interrupt controller bindings used text format, so migrate them
to YAML.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
Changes in v3:
- Remmove 'bindings' keyword from title.
- Put 'compatible' the first also in node sample.

Changes in v2:
- Address review comment from Krzysztof:
- Rebase onto last kernel version.
- Add Thomas Bogendoerfer as maintainer since this is arch stuff.
- Change compatible to go first as property and required.
- Change sample node name to be generic. Use 'interrupt-controller'.

 .../mti,cpu-interrupt-controller.yaml         | 46 ++++++++++++++++++
 .../devicetree/bindings/mips/cpu_irq.txt      | 47 -------------------
 2 files changed, 46 insertions(+), 47 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
 delete mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
new file mode 100644
index 000000000000..46a1f5f54b74
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MIPS CPU Interrupt Controller
+
+description: >
+   On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
+   IRQs from a devicetree file and create a irq_domain for IRQ controller.
+
+   With the irq_domain in place we can describe how the 8 IRQs are wired to the
+   platforms internal interrupt controller cascade.
+
+maintainers:
+  - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+
+properties:
+  compatible:
+    const: mti,cpu-interrupt-controller
+
+  '#interrupt-cells':
+    const: 1
+
+  '#address-cells':
+    const: 0
+
+  interrupt-controller: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#interrupt-cells'
+  - '#address-cells'
+  - interrupt-controller
+
+examples:
+  - |
+    interrupt-controller {
+      compatible = "mti,cpu-interrupt-controller";
+      #address-cells = <0>;
+      #interrupt-cells = <1>;
+      interrupt-controller;
+    };
diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt
deleted file mode 100644
index f080f06da6d8..000000000000
--- a/Documentation/devicetree/bindings/mips/cpu_irq.txt
+++ /dev/null
@@ -1,47 +0,0 @@
-MIPS CPU interrupt controller
-
-On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
-IRQs from a devicetree file and create a irq_domain for IRQ controller.
-
-With the irq_domain in place we can describe how the 8 IRQs are wired to the
-platforms internal interrupt controller cascade.
-
-Below is an example of a platform describing the cascade inside the devicetree
-and the code used to load it inside arch_init_irq().
-
-Required properties:
-- compatible : Should be "mti,cpu-interrupt-controller"
-
-Example devicetree:
-	cpu-irq: cpu-irq {
-		#address-cells = <0>;
-
-		interrupt-controller;
-		#interrupt-cells = <1>;
-
-		compatible = "mti,cpu-interrupt-controller";
-	};
-
-	intc: intc@200 {
-		compatible = "ralink,rt2880-intc";
-		reg = <0x200 0x100>;
-
-		interrupt-controller;
-		#interrupt-cells = <1>;
-
-		interrupt-parent = <&cpu-irq>;
-		interrupts = <2>;
-	};
-
-
-Example platform irq.c:
-static struct of_device_id __initdata of_irq_ids[] = {
-	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
-	{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
-	{},
-};
-
-void __init arch_init_irq(void)
-{
-	of_irq_init(of_irq_ids);
-}
-- 
2.25.1

Re: [PATCH v3] dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML

[Krzysztof Kozlowski]

On 21/09/2022 09:24, Sergio Paracuellos wrote:
> MIPS CPU interrupt controller bindings used text format, so migrate them
> to YAML.
> 
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
> Changes in v3:
> - Remmove 'bindings' keyword from title.
> - Put 'compatible' the first also in node sample.
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v3] dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML

[Rob Herring]

On Wed, 21 Sep 2022 09:24:05 +0200, Sergio Paracuellos wrote:
> MIPS CPU interrupt controller bindings used text format, so migrate them
> to YAML.
> 
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
> Changes in v3:
> - Remmove 'bindings' keyword from title.
> - Put 'compatible' the first also in node sample.
> 
> Changes in v2:
> - Address review comment from Krzysztof:
> - Rebase onto last kernel version.
> - Add Thomas Bogendoerfer as maintainer since this is arch stuff.
> - Change compatible to go first as property and required.
> - Change sample node name to be generic. Use 'interrupt-controller'.
> 
>  .../mti,cpu-interrupt-controller.yaml         | 46 ++++++++++++++++++
>  .../devicetree/bindings/mips/cpu_irq.txt      | 47 -------------------
>  2 files changed, 46 insertions(+), 47 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
>  delete mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt
> 

Applied, thanks!