From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D10EC4332F for ; Thu, 29 Sep 2022 09:21:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235430AbiI2JVu (ORCPT ); Thu, 29 Sep 2022 05:21:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234939AbiI2JVt (ORCPT ); Thu, 29 Sep 2022 05:21:49 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5FC712FF08 for ; Thu, 29 Sep 2022 02:21:47 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id s6so1328828lfo.7 for ; Thu, 29 Sep 2022 02:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date; bh=9dskQRpUPj5W1ioUWccp/L/Tjbt3VYPexwFmRI0ffDk=; b=kX5G87deMyQxetFmP6jescjFeHw6IcRFT/4JhqRVq7XNWFNhuUIxmETx8fbKVs3f9G NgXKbIeMJGXrYdmyFVKLteMKJoM10RSqEmNXbrLyNylUXKM7TApNyURGtIgELuJ7phVn SWiQXT/bW1D4J1fZJxwXEHW3ywW6jveidTkbHaRDjttI14balMw9AdkjzMO2z9Ig6s73 OQ5VfBM7iPyripTQhdVnyh4IGtnon063hl/7oSiwBMGS3m9QlxK+ETclaD+J/9iTy/+t b8GVp0h5f2SZYVHRM2oFgTjVAUZNm6dEICRTbJuHXQpWUkqeMUmEIHtoqpU6ZY0sh6cI b8DA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date; bh=9dskQRpUPj5W1ioUWccp/L/Tjbt3VYPexwFmRI0ffDk=; b=m8Wmw7zDF3Cy7plchr83NNB8iSiTpU3mCsr7cdwgq6J5duFQlp8fp/FjjAspMrKjrf DMjMV8uT0TdA9FPaXZeDN5dqJWhX/G/dGEkHeaLpGxTwUp4oRypN7/0dw43Hwvz58ALm oN4miyzPXHEnltLTuFv74SSEWuQXaGc92Vz8Zxr17fg8uKVPN091tK2ok9jHvXOsbE0h OeQ4f/KsALU4MVM1egQtJzVtlkNSPhBW8cfwgSlKegfDJQ2wFN1EIkltpnj+Hl90Nibv NEwHwv8Y5rKnr7X4OsjIhd6FS3yx6GIo69zJGjjgh/bldQEgzHSC+DlcqHNK8woDu9fI LYog== X-Gm-Message-State: ACrzQf1Lz2rTwkdWM7xJimLdnD9m0TXNooFPmV28gjAsx6+Q0Lz2vpXk BI1/OIjtrW2Cw5lHF0vX+jVFag== X-Google-Smtp-Source: AMsMyM5OUGY14dCBZ5WhOfGOL1Bjoou8bBBm544IiHqIEpwtjW4AGqDMGxU1eIlqIKRCWkkqBg0jwA== X-Received: by 2002:a05:6512:3f29:b0:4a1:c920:ebad with SMTP id y41-20020a0565123f2900b004a1c920ebadmr970154lfa.574.1664443306111; Thu, 29 Sep 2022 02:21:46 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id c22-20020a2e9496000000b0026c687f9f7bsm633271ljh.107.2022.09.29.02.21.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Sep 2022 02:21:45 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 00/11] clk: qcom: update MSM8974 clock controller drivers Date: Thu, 29 Sep 2022 12:21:34 +0300 Message-Id: <20220929092145.473009-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Modernize drivers for global and multimedia clock controllers on the MSM8974 platform. Switch them to using parent_hws/parent_data, use clocks through the DT links rather than fetching them from the system clocks list, update schema and platform DT files. Changes since v1: - Fix typos in the commit messages (Niel) - Change bindings license to dual GPL + BSD (Krzysztof) - Fix issues in gcc bindigns pointed out by Krzysztof - Fix Taniyas's email (Krzysztof) - Removed dsi-names and changed dsi-phy node in the patch adding the second DSI host+PHY (Krzysztof) Dmitry Baryshkov (11): dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974 clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-msm8974: move clock parent tables down clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents clk: qcom: mmcc-msm8974: move clock parent tables down clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names ARM: dts: qcom: msm8974: add second DSI host and PHY ARM: dts: qcom: msm8974: add clocks and clock-names to gcc device ARM: dts: qcom: msm8974: add clocks and clock-names to mmcc device .../bindings/clock/qcom,gcc-msm8974.yaml | 64 ++ .../bindings/clock/qcom,gcc-other.yaml | 9 +- .../devicetree/bindings/clock/qcom,mmcc.yaml | 38 + arch/arm/boot/dts/qcom-msm8974.dtsi | 105 +++ drivers/clk/qcom/gcc-msm8974.c | 682 ++++++++-------- drivers/clk/qcom/mmcc-msm8974.c | 736 +++++++++--------- 6 files changed, 930 insertions(+), 704 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml -- 2.35.1