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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id y5-20020a0568301d8500b0065c0f4552besm682734oti.33.2022.09.30.10.16.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Sep 2022 10:16:38 -0700 (PDT) Received: (nullmailer pid 536421 invoked by uid 1000); Fri, 30 Sep 2022 17:16:37 -0000 Date: Fri, 30 Sep 2022 12:16:37 -0500 From: Rob Herring To: Sergio Paracuellos Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, hauke@hauke-m.de, zajec5@gmail.com, tsbogend@alpha.franken.de, linux-mips@vger.kernel.org, arinc.unal@arinc9.com Subject: Re: [PATCH v3 1/3] dt-bindings: mips: add CPU bindings for MIPS architecture Message-ID: <20220930171637.GA526500-robh@kernel.org> References: <20220929072004.874795-1-sergio.paracuellos@gmail.com> <20220929072004.874795-2-sergio.paracuellos@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220929072004.874795-2-sergio.paracuellos@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Sep 29, 2022 at 09:20:02AM +0200, Sergio Paracuellos wrote: > Add the yaml binding for available CPUs in MIPS architecture. > > Signed-off-by: Sergio Paracuellos > --- > .../devicetree/bindings/mips/cpus.yaml | 66 +++++++++++++++++++ > 1 file changed, 66 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/cpus.yaml > > diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml > new file mode 100644 > index 000000000000..4f8891f0755b > --- /dev/null > +++ b/Documentation/devicetree/bindings/mips/cpus.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mips/cpus.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MIPS CPUs bindings > + > +maintainers: > + - Thomas Bogendoerfer > + > +description: | > + The device tree allows to describe the layout of CPUs in a system through > + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > + defining properties for every CPU. > + > +properties: > + compatible: > + enum: > + - brcm,bmips3300 > + - brcm,bmips4350 > + - brcm,bmips4380 > + - brcm,bmips5000 > + - brcm,bmips5200 Need to remove Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt. > + - ingenic,xburst-mxu1.0 > + - ingenic,xburst-fpu1.0-mxu1.1 > + - ingenic,xburst-fpu2.0-mxu2.0 So we should remove Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml? > + - loongson,gs264 > + - mips,m14Kc > + - mips,mips4Kc > + - mips,mips4KEc > + - mips,mips24Kc > + - mips,mips24KEc > + - mips,mips74Kc > + - mips,mips1004Kc > + - mti,interaptiv > + - mti,mips24KEc > + - mti,mips14KEc > + - mti,mips14Kc > + > + reg: > + maxItems: 1 Does the numbering have some basis in the h/w? > + > +required: > + - compatible > + > +additionalProperties: true Do you need this to be true? What's missing besides 'device_type'? We've got the same issue for Arm cpu schema, so fine for now if there's not an easy fix. Rob