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* [PATCH v6 0/2] dt-bindings: mips: add CPU bindings for MIPS architecture
@ 2022-10-04  5:09 Sergio Paracuellos
  2022-10-04  5:09 ` [PATCH v6 1/2] " Sergio Paracuellos
  2022-10-04  5:09 ` [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings Sergio Paracuellos
  0 siblings, 2 replies; 7+ messages in thread
From: Sergio Paracuellos @ 2022-10-04  5:09 UTC (permalink / raw)
  To: devicetree
  Cc: robh+dt, krzysztof.kozlowski+dt, hauke, zajec5, tsbogend,
	zhouyanjie, linux-mips, arinc.unal, f.fainelli

Hi all,

This series tries to make the correct thing to represent in schema
all the current documentation related with MIPS CPUs.

Broadcom cpus node is a bit special and need to use the property
'mips-hpt-frequency' in the cpus node. Because of this I have introduced
brcm/soc.yaml schema with current broadcom SoCs and making this property
required as per Rob's v3 review comments.

Ingenic cpus have also its schema already mainlined. To unify things I
have also put this information in this mips/cpus.yaml schema and remove
the 'mips/ingenic/ingenic,cpu.yaml' schema. I have also added current
maintainer as maintainer for this 'mips/cpus.yaml' file.

Changes in v6:
  - Avoid 'convert' in SoC's patch commit message since this is just an
    addition and nothing is removed in this patch.
  - Add Florian Fainelli to maintainers of Broadcom SoC bindings
  - Add Florian's Acked-by for broadcom SoC PATCH.
  - Collect Rob's Reviewed-by for both patches.

Changes in v5:
  - Address Krzysztof comments in v4:
      - change BMIPS SoC compatibles into an enum and drop descriptions,
      - Add blank line.
      - Redo commit message since it is not a conversion to schema.
      - Drop 'device tree bindings' from description.
      - Properly describe 'mips-hpt-frequency'.
  - Review cpus node and add a sample to check schema correctness.    

Changes in v4:
- Address Rob's v3 review comments:
    * Drop PATCH introducing special brcm,cpus.yaml only because properyu
    'mips-hpt-frequency' is required and move this property to brcm/soc.yaml
    schema.
    * Remove 'Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml'
    and add that information to general mips/cpus.yaml schema.
    * Define all properties in mips/cpus.yaml and set 'additionalProperties'
    to false.

Changes in v3:
- cpus.yaml:
    * address Krzysztof comment in v2:
    * add Thomas as maintainer since this is architecture binding.
    * s/cpu/CPU
    * compatible goes first
    * Add compatible 'mips,mips4Kc' as per Thomas request.
- Introduce two new schemas for Broadcom BMIPS:
    * soc.yaml: describing the BRCM SoC's
    * brcm,bmips-cpus.yaml: describing the cpu nodes for this platform.

Previous series:
v1: https://lore.kernel.org/all/CAMhs-H-eUTOHjAXAbywOXQJgc_j5Ex-1sB7eBZU_bWt1fpNVzA@mail.gmail.com/T/
v2: https://lore.kernel.org/all/20220918112245.GA5555@alpha.franken.de/T/
v3: https://lore.kernel.org/linux-devicetree/20220929072004.874795-1-sergio.paracuellos@gmail.com/T/#t
v4: https://lore.kernel.org/linux-devicetree/20221001043855.933528-1-sergio.paracuellos@gmail.com/T/#t
v5: https://lore.kernel.org/linux-devicetree/20221002091611.946210-1-sergio.paracuellos@gmail.com/T/#t

Sergio Paracuellos (2):
  dt-bindings: mips: add CPU bindings for MIPS architecture
  dt-bindings: mips: brcm: add Broadcom SoCs bindings

 .../bindings/mips/brcm/brcm,bmips.txt         |   8 --
 .../devicetree/bindings/mips/brcm/soc.yaml    |  98 +++++++++++++++
 .../devicetree/bindings/mips/cpus.yaml        | 115 ++++++++++++++++++
 .../bindings/mips/ingenic/ingenic,cpu.yaml    |  69 -----------
 4 files changed, 213 insertions(+), 77 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt
 create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml
 create mode 100644 Documentation/devicetree/bindings/mips/cpus.yaml
 delete mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml

-- 
2.25.1


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v6 1/2] dt-bindings: mips: add CPU bindings for MIPS architecture
  2022-10-04  5:09 [PATCH v6 0/2] dt-bindings: mips: add CPU bindings for MIPS architecture Sergio Paracuellos
@ 2022-10-04  5:09 ` Sergio Paracuellos
  2022-10-04  5:09 ` [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings Sergio Paracuellos
  1 sibling, 0 replies; 7+ messages in thread
From: Sergio Paracuellos @ 2022-10-04  5:09 UTC (permalink / raw)
  To: devicetree
  Cc: robh+dt, krzysztof.kozlowski+dt, hauke, zajec5, tsbogend,
	zhouyanjie, linux-mips, arinc.unal, f.fainelli, Rob Herring

Add the yaml binding for available CPUs in MIPS architecture.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 .../bindings/mips/brcm/brcm,bmips.txt         |   8 --
 .../devicetree/bindings/mips/cpus.yaml        | 115 ++++++++++++++++++
 .../bindings/mips/ingenic/ingenic,cpu.yaml    |  69 -----------
 3 files changed, 115 insertions(+), 77 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt
 create mode 100644 Documentation/devicetree/bindings/mips/cpus.yaml
 delete mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml

diff --git a/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt b/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt
deleted file mode 100644
index 8ef71b4085ca..000000000000
--- a/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-* Broadcom MIPS (BMIPS) CPUs
-
-Required properties:
-- compatible: "brcm,bmips3300", "brcm,bmips4350", "brcm,bmips4380",
-  "brcm,bmips5000"
-
-- mips-hpt-frequency: This is common to all CPUs in the system so it lives
-  under the "cpus" node.
diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml
new file mode 100644
index 000000000000..e991f4c6668d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/cpus.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/cpus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MIPS CPUs bindings
+
+maintainers:
+  - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+  - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
+
+description: |
+  The device tree allows to describe the layout of CPUs in a system through
+  the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+  defining properties for every CPU.
+
+properties:
+  compatible:
+    enum:
+      - brcm,bmips3300
+      - brcm,bmips4350
+      - brcm,bmips4380
+      - brcm,bmips5000
+      - brcm,bmips5200
+      - ingenic,xburst-mxu1.0
+      - ingenic,xburst-fpu1.0-mxu1.1
+      - ingenic,xburst-fpu2.0-mxu2.0
+      - ingenic,xburst2-fpu2.1-mxu2.1-smt
+      - loongson,gs264
+      - mips,m14Kc
+      - mips,mips4Kc
+      - mips,mips4KEc
+      - mips,mips24Kc
+      - mips,mips24KEc
+      - mips,mips74Kc
+      - mips,mips1004Kc
+      - mti,interaptiv
+      - mti,mips24KEc
+      - mti,mips14KEc
+      - mti,mips14Kc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  device_type: true
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - ingenic,xburst-mxu1.0
+              - ingenic,xburst-fpu1.0-mxu1.1
+              - ingenic,xburst-fpu2.0-mxu2.0
+              - ingenic,xburst2-fpu2.1-mxu2.1-smt
+    then:
+      required:
+        - device_type
+        - clocks
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    cpus {
+      #size-cells = <0>;
+      #address-cells = <1>;
+
+      cpu@0 {
+        compatible = "mips,mips1004Kc";
+        device_type = "cpu";
+        reg = <0>;
+      };
+
+      cpu@1 {
+        compatible = "mips,mips1004Kc";
+        device_type = "cpu";
+        reg = <1>;
+      };
+    };
+
+  - |
+    // Example 2 (Ingenic CPU)
+    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
+
+    cpus {
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      cpu@0 {
+        compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+        device_type = "cpu";
+        reg = <0>;
+
+        clocks = <&cgu JZ4780_CLK_CPU>;
+      };
+
+      cpu@1 {
+        compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+        device_type = "cpu";
+        reg = <1>;
+
+        clocks = <&cgu JZ4780_CLK_CORE1>;
+      };
+    };
+...
diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
deleted file mode 100644
index b7e7fa715437..000000000000
--- a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
+++ /dev/null
@@ -1,69 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Bindings for Ingenic XBurst family CPUs
-
-maintainers:
-  - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
-
-description:
-  Ingenic XBurst family CPUs shall have the following properties.
-
-properties:
-  compatible:
-    oneOf:
-
-      - description: Ingenic XBurst®1 CPU Cores
-        enum:
-          - ingenic,xburst-mxu1.0
-          - ingenic,xburst-fpu1.0-mxu1.1
-          - ingenic,xburst-fpu2.0-mxu2.0
-
-      - description: Ingenic XBurst®2 CPU Cores
-        enum:
-          - ingenic,xburst2-fpu2.1-mxu2.1-smt
-
-  reg:
-    maxItems: 1
-
-  clocks:
-    maxItems: 1
-
-  device_type: true
-
-required:
-  - device_type
-  - compatible
-  - reg
-  - clocks
-
-additionalProperties: false
-
-examples:
-  - |
-    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
-
-    cpus {
-        #address-cells = <1>;
-        #size-cells = <0>;
-
-        cpu0: cpu@0 {
-                device_type = "cpu";
-                compatible = "ingenic,xburst-fpu1.0-mxu1.1";
-                reg = <0>;
-
-                clocks = <&cgu JZ4780_CLK_CPU>;
-        };
-
-        cpu1: cpu@1 {
-                device_type = "cpu";
-                compatible = "ingenic,xburst-fpu1.0-mxu1.1";
-                reg = <1>;
-
-                clocks = <&cgu JZ4780_CLK_CORE1>;
-        };
-    };
-...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings
  2022-10-04  5:09 [PATCH v6 0/2] dt-bindings: mips: add CPU bindings for MIPS architecture Sergio Paracuellos
  2022-10-04  5:09 ` [PATCH v6 1/2] " Sergio Paracuellos
@ 2022-10-04  5:09 ` Sergio Paracuellos
  2022-10-04  5:14   ` Rafał Miłecki
  1 sibling, 1 reply; 7+ messages in thread
From: Sergio Paracuellos @ 2022-10-04  5:09 UTC (permalink / raw)
  To: devicetree
  Cc: robh+dt, krzysztof.kozlowski+dt, hauke, zajec5, tsbogend,
	zhouyanjie, linux-mips, arinc.unal, f.fainelli, Rob Herring

Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms.

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 .../devicetree/bindings/mips/brcm/soc.yaml    | 98 +++++++++++++++++++
 1 file changed, 98 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml

diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
new file mode 100644
index 000000000000..39b4609cd1cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom cable/DSL/settop platforms
+
+maintainers:
+  - Hauke Mehrtens <hauke@hauke-m.de>
+  - Rafał Miłecki <zajec5@gmail.com>
+  - Florian Fainelli <f.fainelli@gmail.com>
+
+description: |
+    Boards Broadcom cable/DSL/settop SoC shall have the following properties.
+    The experimental -viper variants are for running Linux on the 3384's
+    BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
+
+properties:
+  $nodename:
+    const: '/'
+
+  compatible:
+    enum:
+      - brcm,bcm3368
+      - brcm,bcm3384
+      - brcm,bcm33843
+      - brcm,bcm3384-viper
+      - brcm,bcm33843-viper
+      - brcm,bcm6328
+      - brcm,bcm6358
+      - brcm,bcm6362
+      - brcm,bcm6368
+      - brcm,bcm63168
+      - brcm,bcm63268
+      - brcm,bcm7125
+      - brcm,bcm7346
+      - brcm,bcm7358
+      - brcm,bcm7360
+      - brcm,bcm7362
+      - brcm,bcm7420
+      - brcm,bcm7425
+
+  cpus:
+    type: object
+    additionalProperties: false
+    properties:
+      '#address-cells':
+        const: 1
+
+      '#size-cells':
+        const: 0
+
+      mips-hpt-frequency:
+        description: MIPS counter high precision timer frequency.
+         This is common to all CPUs in the system so it lives
+         under the "cpus" node.
+        $ref: /schemas/types.yaml#/definitions/uint32
+
+    patternProperties:
+      "^cpu@[0-9]$":
+        type: object
+        $ref: /schemas/mips/cpus.yaml#
+        unevaluatedProperties: false
+
+    required:
+      - mips-hpt-frequency
+
+additionalProperties: true
+
+examples:
+  - |
+     / {
+         compatible = "brcm,bcm3368";
+         #address-cells = <1>;
+         #size-cells = <1>;
+         model = "Broadcom 3368";
+
+         cpus {
+           #address-cells = <1>;
+           #size-cells = <0>;
+
+           mips-hpt-frequency = <150000000>;
+
+           cpu@0 {
+             compatible = "brcm,bmips4350";
+             device_type = "cpu";
+             reg = <0>;
+           };
+
+           cpu@1 {
+             compatible = "brcm,bmips4350";
+             device_type = "cpu";
+             reg = <1>;
+           };
+         };
+       };
+...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings
  2022-10-04  5:09 ` [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings Sergio Paracuellos
@ 2022-10-04  5:14   ` Rafał Miłecki
  2022-10-04  5:20     ` Sergio Paracuellos
  0 siblings, 1 reply; 7+ messages in thread
From: Rafał Miłecki @ 2022-10-04  5:14 UTC (permalink / raw)
  To: Sergio Paracuellos, devicetree
  Cc: robh+dt, krzysztof.kozlowski+dt, hauke, tsbogend, zhouyanjie,
	linux-mips, arinc.unal, f.fainelli, Rob Herring

On 4.10.2022 07:09, Sergio Paracuellos wrote:
> Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms.
> 
> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
>   .../devicetree/bindings/mips/brcm/soc.yaml    | 98 +++++++++++++++++++
>   1 file changed, 98 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> new file mode 100644
> index 000000000000..39b4609cd1cc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom cable/DSL/settop platforms
> +
> +maintainers:
> +  - Hauke Mehrtens <hauke@hauke-m.de>
> +  - Rafał Miłecki <zajec5@gmail.com>
> +  - Florian Fainelli <f.fainelli@gmail.com>

The only MIPS SoCs I really worked on were BCM47xx. I didn't do any real
work on cable/DSL/STB.

I don't really feel up to like maintaining those SoCs.


> +
> +description: |
> +    Boards Broadcom cable/DSL/settop SoC shall have the following properties.
> +    The experimental -viper variants are for running Linux on the 3384's
> +    BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
> +
> +properties:
> +  $nodename:
> +    const: '/'
> +
> +  compatible:
> +    enum:
> +      - brcm,bcm3368
> +      - brcm,bcm3384
> +      - brcm,bcm33843
> +      - brcm,bcm3384-viper
> +      - brcm,bcm33843-viper
> +      - brcm,bcm6328
> +      - brcm,bcm6358
> +      - brcm,bcm6362
> +      - brcm,bcm6368
> +      - brcm,bcm63168
> +      - brcm,bcm63268
> +      - brcm,bcm7125
> +      - brcm,bcm7346
> +      - brcm,bcm7358
> +      - brcm,bcm7360
> +      - brcm,bcm7362
> +      - brcm,bcm7420
> +      - brcm,bcm7425
> +
> +  cpus:
> +    type: object
> +    additionalProperties: false
> +    properties:
> +      '#address-cells':
> +        const: 1
> +
> +      '#size-cells':
> +        const: 0
> +
> +      mips-hpt-frequency:
> +        description: MIPS counter high precision timer frequency.
> +         This is common to all CPUs in the system so it lives
> +         under the "cpus" node.
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +
> +    patternProperties:
> +      "^cpu@[0-9]$":
> +        type: object
> +        $ref: /schemas/mips/cpus.yaml#
> +        unevaluatedProperties: false
> +
> +    required:
> +      - mips-hpt-frequency
> +
> +additionalProperties: true
> +
> +examples:
> +  - |
> +     / {
> +         compatible = "brcm,bcm3368";
> +         #address-cells = <1>;
> +         #size-cells = <1>;
> +         model = "Broadcom 3368";
> +
> +         cpus {
> +           #address-cells = <1>;
> +           #size-cells = <0>;
> +
> +           mips-hpt-frequency = <150000000>;
> +
> +           cpu@0 {
> +             compatible = "brcm,bmips4350";
> +             device_type = "cpu";
> +             reg = <0>;
> +           };
> +
> +           cpu@1 {
> +             compatible = "brcm,bmips4350";
> +             device_type = "cpu";
> +             reg = <1>;
> +           };
> +         };
> +       };
> +...


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings
  2022-10-04  5:14   ` Rafał Miłecki
@ 2022-10-04  5:20     ` Sergio Paracuellos
  2022-10-05 20:32       ` Hauke Mehrtens
  0 siblings, 1 reply; 7+ messages in thread
From: Sergio Paracuellos @ 2022-10-04  5:20 UTC (permalink / raw)
  To: Rafał Miłecki
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Krzysztof Kozlowski, Hauke Mehrtens,
	Thomas Bogendoerfer, zhouyanjie, open list:MIPS,
	Arınç ÜNAL, Florian Fainelli, Rob Herring

On Tue, Oct 4, 2022 at 7:14 AM Rafał Miłecki <zajec5@gmail.com> wrote:
>
> On 4.10.2022 07:09, Sergio Paracuellos wrote:
> > Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms.
> >
> > Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> > ---
> >   .../devicetree/bindings/mips/brcm/soc.yaml    | 98 +++++++++++++++++++
> >   1 file changed, 98 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > new file mode 100644
> > index 000000000000..39b4609cd1cc
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > @@ -0,0 +1,98 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Broadcom cable/DSL/settop platforms
> > +
> > +maintainers:
> > +  - Hauke Mehrtens <hauke@hauke-m.de>
> > +  - Rafał Miłecki <zajec5@gmail.com>
> > +  - Florian Fainelli <f.fainelli@gmail.com>
>
> The only MIPS SoCs I really worked on were BCM47xx. I didn't do any real
> work on cable/DSL/STB.
>
> I don't really feel up to like maintaining those SoCs.

I can remove you from maintainers in this new file. I added you
because of this entry in MAINTAINERS file:

BROADCOM BCM47XX MIPS ARCHITECTURE
M:  Hauke Mehrtens <hauke@hauke-m.de>
M:  Rafał Miłecki <zajec5@gmail.com>
L:  linux-mips@vger.kernel.org
S:  Maintained
F:  Documentation/devicetree/bindings/mips/brcm/
F:  arch/mips/bcm47xx/*
F:  arch/mips/include/asm/mach-bcm47xx/*

Since 'Documentation/devicetree/bindings/mips/brcm/' is supposed to be
maintained also by you I thought it makes sense to list you also here.

I don't know, maybe you should remove yourself also from the
MAINTAINERS file for BROADCOM BCM47XX MIPS ARCHITECTURE???

Let me know what you want me to do.

Thanks,
    Sergio Paracuellos
>
>
> > +
> > +description: |
> > +    Boards Broadcom cable/DSL/settop SoC shall have the following properties.
> > +    The experimental -viper variants are for running Linux on the 3384's
> > +    BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
> > +
> > +properties:
> > +  $nodename:
> > +    const: '/'
> > +
> > +  compatible:
> > +    enum:
> > +      - brcm,bcm3368
> > +      - brcm,bcm3384
> > +      - brcm,bcm33843
> > +      - brcm,bcm3384-viper
> > +      - brcm,bcm33843-viper
> > +      - brcm,bcm6328
> > +      - brcm,bcm6358
> > +      - brcm,bcm6362
> > +      - brcm,bcm6368
> > +      - brcm,bcm63168
> > +      - brcm,bcm63268
> > +      - brcm,bcm7125
> > +      - brcm,bcm7346
> > +      - brcm,bcm7358
> > +      - brcm,bcm7360
> > +      - brcm,bcm7362
> > +      - brcm,bcm7420
> > +      - brcm,bcm7425
> > +
> > +  cpus:
> > +    type: object
> > +    additionalProperties: false
> > +    properties:
> > +      '#address-cells':
> > +        const: 1
> > +
> > +      '#size-cells':
> > +        const: 0
> > +
> > +      mips-hpt-frequency:
> > +        description: MIPS counter high precision timer frequency.
> > +         This is common to all CPUs in the system so it lives
> > +         under the "cpus" node.
> > +        $ref: /schemas/types.yaml#/definitions/uint32
> > +
> > +    patternProperties:
> > +      "^cpu@[0-9]$":
> > +        type: object
> > +        $ref: /schemas/mips/cpus.yaml#
> > +        unevaluatedProperties: false
> > +
> > +    required:
> > +      - mips-hpt-frequency
> > +
> > +additionalProperties: true
> > +
> > +examples:
> > +  - |
> > +     / {
> > +         compatible = "brcm,bcm3368";
> > +         #address-cells = <1>;
> > +         #size-cells = <1>;
> > +         model = "Broadcom 3368";
> > +
> > +         cpus {
> > +           #address-cells = <1>;
> > +           #size-cells = <0>;
> > +
> > +           mips-hpt-frequency = <150000000>;
> > +
> > +           cpu@0 {
> > +             compatible = "brcm,bmips4350";
> > +             device_type = "cpu";
> > +             reg = <0>;
> > +           };
> > +
> > +           cpu@1 {
> > +             compatible = "brcm,bmips4350";
> > +             device_type = "cpu";
> > +             reg = <1>;
> > +           };
> > +         };
> > +       };
> > +...
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings
  2022-10-04  5:20     ` Sergio Paracuellos
@ 2022-10-05 20:32       ` Hauke Mehrtens
  2022-10-06  4:25         ` Sergio Paracuellos
  0 siblings, 1 reply; 7+ messages in thread
From: Hauke Mehrtens @ 2022-10-05 20:32 UTC (permalink / raw)
  To: Sergio Paracuellos, Rafał Miłecki
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Krzysztof Kozlowski, Thomas Bogendoerfer, zhouyanjie,
	open list:MIPS, Arınç ÜNAL, Florian Fainelli,
	Rob Herring

On 10/4/22 07:20, Sergio Paracuellos wrote:
> On Tue, Oct 4, 2022 at 7:14 AM Rafał Miłecki <zajec5@gmail.com> wrote:
>>
>> On 4.10.2022 07:09, Sergio Paracuellos wrote:
>>> Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms.
>>>
>>> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>>> Reviewed-by: Rob Herring <robh@kernel.org>
>>> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>>> ---
>>>    .../devicetree/bindings/mips/brcm/soc.yaml    | 98 +++++++++++++++++++
>>>    1 file changed, 98 insertions(+)
>>>    create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
>>> new file mode 100644
>>> index 000000000000..39b4609cd1cc
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
>>> @@ -0,0 +1,98 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Broadcom cable/DSL/settop platforms
>>> +
>>> +maintainers:
>>> +  - Hauke Mehrtens <hauke@hauke-m.de>
>>> +  - Rafał Miłecki <zajec5@gmail.com>
>>> +  - Florian Fainelli <f.fainelli@gmail.com>
>>
>> The only MIPS SoCs I really worked on were BCM47xx. I didn't do any real
>> work on cable/DSL/STB.
>>
>> I don't really feel up to like maintaining those SoCs.
> 
> I can remove you from maintainers in this new file. I added you
> because of this entry in MAINTAINERS file:
> 
> BROADCOM BCM47XX MIPS ARCHITECTURE
> M:  Hauke Mehrtens <hauke@hauke-m.de>
> M:  Rafał Miłecki <zajec5@gmail.com>
> L:  linux-mips@vger.kernel.org
> S:  Maintained
> F:  Documentation/devicetree/bindings/mips/brcm/
> F:  arch/mips/bcm47xx/*
> F:  arch/mips/include/asm/mach-bcm47xx/*
> 
> Since 'Documentation/devicetree/bindings/mips/brcm/' is supposed to be
> maintained also by you I thought it makes sense to list you also here.
> 
> I don't know, maybe you should remove yourself also from the
> MAINTAINERS file for BROADCOM BCM47XX MIPS ARCHITECTURE???
> 
> Let me know what you want me to do.
> 
> Thanks,
>      Sergio Paracuellos

Hi,

Please remove me also from the maintainers of this Broadcom CPU like you 
removed Rafał. The BCM47XX SoCs mostly use standard MIPS cores and only 
very few use Broadcom MIPS cores. The Broadcom MIPS cores are much more 
often used in the BCM63XX SoCs.

Hauke


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings
  2022-10-05 20:32       ` Hauke Mehrtens
@ 2022-10-06  4:25         ` Sergio Paracuellos
  0 siblings, 0 replies; 7+ messages in thread
From: Sergio Paracuellos @ 2022-10-06  4:25 UTC (permalink / raw)
  To: Hauke Mehrtens
  Cc: Rafał Miłecki,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Krzysztof Kozlowski, Thomas Bogendoerfer, zhouyanjie,
	open list:MIPS, Arınç ÜNAL, Florian Fainelli,
	Rob Herring

On Wed, Oct 5, 2022 at 10:32 PM Hauke Mehrtens <hauke@hauke-m.de> wrote:
>
> On 10/4/22 07:20, Sergio Paracuellos wrote:
> > On Tue, Oct 4, 2022 at 7:14 AM Rafał Miłecki <zajec5@gmail.com> wrote:
> >>
> >> On 4.10.2022 07:09, Sergio Paracuellos wrote:
> >>> Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms.
> >>>
> >>> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> >>> Reviewed-by: Rob Herring <robh@kernel.org>
> >>> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> >>> ---
> >>>    .../devicetree/bindings/mips/brcm/soc.yaml    | 98 +++++++++++++++++++
> >>>    1 file changed, 98 insertions(+)
> >>>    create mode 100644 Documentation/devicetree/bindings/mips/brcm/soc.yaml
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> >>> new file mode 100644
> >>> index 000000000000..39b4609cd1cc
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> >>> @@ -0,0 +1,98 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>> +%YAML 1.2
> >>> +---
> >>> +$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
> >>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>> +
> >>> +title: Broadcom cable/DSL/settop platforms
> >>> +
> >>> +maintainers:
> >>> +  - Hauke Mehrtens <hauke@hauke-m.de>
> >>> +  - Rafał Miłecki <zajec5@gmail.com>
> >>> +  - Florian Fainelli <f.fainelli@gmail.com>
> >>
> >> The only MIPS SoCs I really worked on were BCM47xx. I didn't do any real
> >> work on cable/DSL/STB.
> >>
> >> I don't really feel up to like maintaining those SoCs.
> >
> > I can remove you from maintainers in this new file. I added you
> > because of this entry in MAINTAINERS file:
> >
> > BROADCOM BCM47XX MIPS ARCHITECTURE
> > M:  Hauke Mehrtens <hauke@hauke-m.de>
> > M:  Rafał Miłecki <zajec5@gmail.com>
> > L:  linux-mips@vger.kernel.org
> > S:  Maintained
> > F:  Documentation/devicetree/bindings/mips/brcm/
> > F:  arch/mips/bcm47xx/*
> > F:  arch/mips/include/asm/mach-bcm47xx/*
> >
> > Since 'Documentation/devicetree/bindings/mips/brcm/' is supposed to be
> > maintained also by you I thought it makes sense to list you also here.
> >
> > I don't know, maybe you should remove yourself also from the
> > MAINTAINERS file for BROADCOM BCM47XX MIPS ARCHITECTURE???
> >
> > Let me know what you want me to do.
> >
> > Thanks,
> >      Sergio Paracuellos
>
> Hi,
>
> Please remove me also from the maintainers of this Broadcom CPU like you
> removed Rafał. The BCM47XX SoCs mostly use standard MIPS cores and only
> very few use Broadcom MIPS cores. The Broadcom MIPS cores are much more
> often used in the BCM63XX SoCs.

Sure. Will do and send v8.

Thanks.
    Sergio Paracuellos
>
> Hauke
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2022-10-06  4:25 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-04  5:09 [PATCH v6 0/2] dt-bindings: mips: add CPU bindings for MIPS architecture Sergio Paracuellos
2022-10-04  5:09 ` [PATCH v6 1/2] " Sergio Paracuellos
2022-10-04  5:09 ` [PATCH v6 2/2] dt-bindings: mips: brcm: add Broadcom SoCs bindings Sergio Paracuellos
2022-10-04  5:14   ` Rafał Miłecki
2022-10-04  5:20     ` Sergio Paracuellos
2022-10-05 20:32       ` Hauke Mehrtens
2022-10-06  4:25         ` Sergio Paracuellos

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