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From: "Pali Rohár" <pali@kernel.org>
To: devicetree@vger.kernel.org, "Rob Herring" <robh+dt@kernel.org>,
	"Marek Behún" <kabel@kernel.org>
Subject: Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
Date: Sun, 9 Oct 2022 13:38:25 +0200	[thread overview]
Message-ID: <20221009113825.l67w4qvv6v5kmst4@pali> (raw)
In-Reply-To: <20220831114640.qwfr7lea3lvcfl2v@pali>

PING?

If you really do not care about documentation then just tell people to
not waste time on doing it. Because dts files can be compiled and used
on the real hardware without those superfluous YAML files.

On Wednesday 31 August 2022 13:46:40 Pali Rohár wrote:
> PING? Documentation binding patch is waiting there fore two months.
> Could we move forward?
> 
> Note that meanwhile turris1x.dts which uses this was merged.
> 
> On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
> > Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> > CPLD Design.
> > 
> > Signed-off-by: Marek Behún <kabel@kernel.org>
> > ---
> >  .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml    | 73 +++++++++++++++++++
> >  1 file changed, 73 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > new file mode 100644
> > index 000000000000..822dfb93dcd8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > @@ -0,0 +1,73 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
> > +
> > +maintainers:
> > +  - Pali Rohár <pali@kernel.org>
> > +
> > +description: |
> > +  A simple bus enabling access to peripherals on boards with use Freescale
> > +  P1021RDB Combo Board CPLD Design.
> > +
> > +  The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
> > +  specified in the Devicetree Specification. It is an extension of "simple-bus"
> > +  because some registers are CPLD specific and allows to identify if board has
> > +  wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
> > +
> > +select:
> > +  properties:
> > +    compatible:
> > +      contains:
> > +        const: fsl,p1021rdb-pc-cpld
> > +  required:
> > +    - compatible
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
> > +
> > +  compatible:
> > +    items:
> > +      - const: fsl,p1021rdb-pc-cpld
> > +      - const: simple-bus
> > +
> > +  '#address-cells':
> > +    enum: [ 1, 2 ]
> > +
> > +  '#size-cells':
> > +    enum: [ 1, 2 ]
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  ranges: true
> > +
> > +required:
> > +  - compatible
> > +  - '#address-cells'
> > +  - '#size-cells'
> > +  - reg
> > +  - ranges
> > +
> > +additionalProperties:
> > +  type: object
> > +
> > +examples:
> > +  - |
> > +
> > +    localbus {
> > +        #address-cells = <2>;
> > +        #size-cells = <1>;
> > +
> > +        cpld@3,0 {
> > +            #address-cells = <1>;
> > +            #size-cells = <1>;
> > +            compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
> > +            reg = <0x3 0x0 0x20000>;
> > +            ranges = <0x0 0x3 0x0 0x20000>;
> > +        };
> > +    };
> > -- 
> > 2.35.1
> > 

  reply	other threads:[~2022-10-09 11:38 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-05 17:54 [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld Marek Behún
2022-07-05 19:18 ` Rob Herring
2022-07-05 20:09 ` Rob Herring
2022-07-06 16:56   ` Marek Behún
2022-07-12 17:05     ` Rob Herring
2022-08-18 21:36       ` Pali Rohár
2022-08-31 11:46 ` Pali Rohár
2022-10-09 11:38   ` Pali Rohár [this message]
2022-11-01 22:27     ` Pali Rohár

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