From: Siarhei Volkau <lis8215@gmail.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Siarhei Volkau <lis8215@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Cercueil <paul@crapouillou.net>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org
Subject: [PATCH v2 3/4] dt-bindings: clock: Add Ingenic JZ4755 CGU header
Date: Sun, 16 Oct 2022 18:01:08 +0300 [thread overview]
Message-ID: <20221016150110.3020451-4-lis8215@gmail.com> (raw)
In-Reply-To: <20221016150110.3020451-1-lis8215@gmail.com>
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4755-cgu driver.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
---
.../dt-bindings/clock/ingenic,jz4755-cgu.h | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 include/dt-bindings/clock/ingenic,jz4755-cgu.h
diff --git a/include/dt-bindings/clock/ingenic,jz4755-cgu.h b/include/dt-bindings/clock/ingenic,jz4755-cgu.h
new file mode 100644
index 000000000..1ac13d61b
--- /dev/null
+++ b/include/dt-bindings/clock/ingenic,jz4755-cgu.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) */
+/*
+ * This header provides clock numbers for the ingenic,jz4755-cgu DT binding.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
+#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
+
+#define JZ4755_CLK_EXT 0
+#define JZ4755_CLK_OSC32K 1
+#define JZ4755_CLK_PLL 2
+#define JZ4755_CLK_PLL_HALF 3
+#define JZ4755_CLK_EXT_HALF 4
+#define JZ4755_CLK_CCLK 5
+#define JZ4755_CLK_H0CLK 6
+#define JZ4755_CLK_PCLK 7
+#define JZ4755_CLK_MCLK 8
+#define JZ4755_CLK_H1CLK 9
+#define JZ4755_CLK_UDC 10
+#define JZ4755_CLK_LCD 11
+#define JZ4755_CLK_UART0 12
+#define JZ4755_CLK_UART1 13
+#define JZ4755_CLK_UART2 14
+#define JZ4755_CLK_DMA 15
+#define JZ4755_CLK_MMC 16
+#define JZ4755_CLK_MMC0 17
+#define JZ4755_CLK_MMC1 18
+#define JZ4755_CLK_EXT512 19
+#define JZ4755_CLK_RTC 20
+#define JZ4755_CLK_UDC_PHY 21
+#define JZ4755_CLK_I2S 22
+#define JZ4755_CLK_SPI 23
+#define JZ4755_CLK_AIC 24
+#define JZ4755_CLK_ADC 25
+#define JZ4755_CLK_TCU 26
+#define JZ4755_CLK_BCH 27
+#define JZ4755_CLK_I2C 28
+#define JZ4755_CLK_TVE 29
+#define JZ4755_CLK_CIM 30
+#define JZ4755_CLK_AUX_CPU 31
+#define JZ4755_CLK_AHB1 32
+#define JZ4755_CLK_IDCT 33
+#define JZ4755_CLK_DB 34
+#define JZ4755_CLK_ME 35
+#define JZ4755_CLK_MC 36
+#define JZ4755_CLK_TSSI 37
+#define JZ4755_CLK_IPU 38
+
+#endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */
--
2.36.1
next prev parent reply other threads:[~2022-10-16 15:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-16 15:01 [PATCH v2 0/4] Add Ingenic JZ4755 CGU driver Siarhei Volkau
2022-10-16 15:01 ` [PATCH v2 1/4] MIPS: ingenic: add new machine type MACH_JZ4755 Siarhei Volkau
2022-10-17 9:09 ` Paul Cercueil
2022-10-17 16:40 ` Siarhei Volkau
2022-10-16 15:01 ` [PATCH v2 2/4] dt-bindings: ingenic: Add support for the JZ4755 CGU Siarhei Volkau
2022-10-16 15:31 ` Krzysztof Kozlowski
2022-10-16 15:01 ` Siarhei Volkau [this message]
2022-10-16 15:32 ` [PATCH v2 3/4] dt-bindings: clock: Add Ingenic JZ4755 CGU header Krzysztof Kozlowski
2022-10-16 18:21 ` Siarhei Volkau
2022-10-17 1:00 ` Krzysztof Kozlowski
2022-10-17 18:34 ` Rob Herring
2022-10-16 15:01 ` [PATCH v2 4/4] clk: Add Ingenic JZ4755 CGU driver Siarhei Volkau
2022-10-17 9:24 ` Paul Cercueil
2022-10-17 17:10 ` Siarhei Volkau
2022-10-17 17:24 ` Paul Cercueil
2022-10-17 18:07 ` Siarhei Volkau
2022-10-18 13:30 ` Paul Cercueil
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