devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [RFC RESEND PATCH 0/2] RZ/G2UL separate out SoC specific parts
@ 2022-10-17  9:11 Prabhakar
  2022-10-17  9:12 ` [RFC RESEND PATCH 1/2] arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property Prabhakar
                   ` (2 more replies)
  0 siblings, 3 replies; 10+ messages in thread
From: Prabhakar @ 2022-10-17  9:11 UTC (permalink / raw)
  To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
	Arnd Bergmann, Olof Johansson, soc, linux-arm-kernel,
	Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv
  Cc: Conor Dooley, Samuel Holland, linux-renesas-soc, devicetree,
	linux-kernel, Prabhakar, Biju Das, Lad Prabhakar

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series aims to split up the RZ/G2UL SoC DTSI into common parts
so that this can be shared with the RZ/Five SoC.

Implementation is based on the discussion [0] where I have used option#2.

The Renesas RZ/G2UL (ARM64) and RZ/Five (RISC-V) have almost the same
identical blocks to avoid duplication a base SoC dtsi (r9a07g043.dtsi) is
created which will be used by the RZ/G2UL (r9a07g043u.dtsi) and RZ/Five
(r9a07g043F.dtsi)

Sending this as an RFC to get some feedback.

r9a07g043f.dtsi will look something like below:

#include <dt-bindings/interrupt-controller/irq.h>

#define SOC_PERIPHERAL_IRQ_NUMBER(nr)	(nr + 32)
#define SOC_PERIPHERAL_IRQ(nr, na)	SOC_PERIPHERAL_IRQ_NUMBER(nr) na

#include <arm64/renesas/r9a07g043.dtsi>

/ {
   ...
   ...   
};

Although patch#2 can be merged into patch#1 just wanted to keep them separated
for easier review.

RFC-> RESEND RFC
* Patches rebased on [1]

RFC: [2]

[0] https://lore.kernel.org/linux-arm-kernel/Yyt8s5+pyoysVNeC@spud/T/
[1] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221009230044.10961-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
[2] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20220929172356.301342-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

Cheers,
Prabhakar

Lad Prabhakar (2):
  arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro
    to specify interrupt property
  arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts

 arch/arm64/boot/dts/renesas/r9a07g043.dtsi    | 347 ++++++++----------
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi   |  72 ++++
 .../boot/dts/renesas/r9a07g043u11-smarc.dts   |   2 +-
 3 files changed, 220 insertions(+), 201 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi

-- 
2.25.1


^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-10-27  8:21 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-17  9:11 [RFC RESEND PATCH 0/2] RZ/G2UL separate out SoC specific parts Prabhakar
2022-10-17  9:12 ` [RFC RESEND PATCH 1/2] arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property Prabhakar
2022-10-25 12:28   ` Geert Uytterhoeven
2022-10-25 16:10     ` Lad, Prabhakar
2022-10-17  9:12 ` [RFC RESEND PATCH 2/2] arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts Prabhakar
2022-10-25 12:37   ` Geert Uytterhoeven
2022-10-25 16:13     ` Lad, Prabhakar
2022-10-27  8:20       ` Lad, Prabhakar
2022-10-25 12:42 ` [RFC RESEND PATCH 0/2] RZ/G2UL separate out " Geert Uytterhoeven
2022-10-25 16:15   ` Lad, Prabhakar

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).