From: Runyang Chen <Runyang.Chen@mediatek.com>
To: Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
<nfraprado@collabora.com>
Cc: <angelogioacchino.delregno@collabora.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
<linux-watchdog@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
Runyang Chen <runyang.chen@mediatek.com>
Subject: [RESEND v3 2/3] dt-bindings: reset: mt8188: add toprgu reset-controller header file
Date: Wed, 26 Oct 2022 14:33:26 +0800 [thread overview]
Message-ID: <20221026063327.20037-3-Runyang.Chen@mediatek.com> (raw)
In-Reply-To: <20221026063327.20037-1-Runyang.Chen@mediatek.com>
From: Runyang Chen <runyang.chen@mediatek.com>
Add toprgu reset-controller header file for MT8188
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
include/dt-bindings/reset/mt8188-resets.h | 36 +++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8188-resets.h
diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
new file mode 100644
index 000000000000..377cdfda82a9
--- /dev/null
+++ b/include/dt-bindings/reset/mt8188-resets.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Runyang Chen <runyang.chen@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8188
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8188
+
+#define MT8188_TOPRGU_CONN_MCU_SW_RST 0
+#define MT8188_TOPRGU_INFRA_GRST_SW_RST 1
+#define MT8188_TOPRGU_IPU0_SW_RST 2
+#define MT8188_TOPRGU_IPU1_SW_RST 3
+#define MT8188_TOPRGU_IPU2_SW_RST 4
+#define MT8188_TOPRGU_AUD_ASRC_SW_RST 5
+#define MT8188_TOPRGU_INFRA_SW_RST 6
+#define MT8188_TOPRGU_MMSYS_SW_RST 7
+#define MT8188_TOPRGU_MFG_SW_RST 8
+#define MT8188_TOPRGU_VENC_SW_RST 9
+#define MT8188_TOPRGU_VDEC_SW_RST 10
+#define MT8188_TOPRGU_CAM_VCORE_SW_RST 11
+#define MT8188_TOPRGU_SCP_SW_RST 12
+#define MT8188_TOPRGU_APMIXEDSYS_SW_RST 13
+#define MT8188_TOPRGU_AUDIO_SW_RST 14
+#define MT8188_TOPRGU_CAMSYS_SW_RST 15
+#define MT8188_TOPRGU_MJC_SW_RST 16
+#define MT8188_TOPRGU_PERI_SW_RST 17
+#define MT8188_TOPRGU_PERI_AO_SW_RST 18
+#define MT8188_TOPRGU_PCIE_SW_RST 19
+#define MT8188_TOPRGU_ADSPSYS_SW_RST 21
+#define MT8188_TOPRGU_DPTX_SW_RST 22
+#define MT8188_TOPRGU_SPMI_MST_SW_RST 23
+
+#define MT8188_TOPRGU_SW_RST_NUM 24
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8188 */
--
2.18.0
next prev parent reply other threads:[~2022-10-26 6:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 6:33 [RESEND v3 0/3] Add watchdog support for MT8188 Soc Runyang Chen
2022-10-26 6:33 ` [RESEND v3 1/3] dt-bindings: watchdog: Add compatible for MediaTek MT8188 Runyang Chen
2022-10-26 15:26 ` Guenter Roeck
2022-10-27 7:54 ` AngeloGioacchino Del Regno
2022-10-27 8:56 ` Allen-KH Cheng (程冠勳)
2022-10-27 13:42 ` Guenter Roeck
2022-10-27 13:54 ` Allen-KH Cheng (程冠勳)
2022-10-27 14:52 ` Krzysztof Kozlowski
2022-10-26 6:33 ` Runyang Chen [this message]
2022-10-26 15:28 ` [RESEND v3 2/3] dt-bindings: reset: mt8188: add toprgu reset-controller header file Guenter Roeck
2022-10-26 6:33 ` [RESEND v3 3/3] watchdog: mediatek: mt8188: add wdt support Runyang Chen
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