From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C550FA3743 for ; Thu, 27 Oct 2022 18:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235717AbiJ0SZO (ORCPT ); Thu, 27 Oct 2022 14:25:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235842AbiJ0SYz (ORCPT ); Thu, 27 Oct 2022 14:24:55 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DB4831DED; Thu, 27 Oct 2022 11:24:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BBCCDB82752; Thu, 27 Oct 2022 18:24:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 366AEC433D6; Thu, 27 Oct 2022 18:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666895089; bh=59Pw40a4Cn+LbgrGbl89Wp804IafCpdymwLTbzmtb8Q=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=PwetMeddijuZSfdb3qiz+ALrl6FPHsc1Ei/dIxhQiaQxHCeRRdYV9+Hpiq/qZghfF jcYKLCDWLeYWlzaMjMRMc116RahtvDMmn5AHskY8stRDqNNPRWHfFUtbG7G+iYCglM VtMEI+FWgRCBrujaz+mRJPPa5t7E8pEFJJ2ihiJHqKn42Gk19m82BVaHCAjypsdDeY e7CNhKZU/TtBq5flOmTRUm9xNx/38qUmYnMjpWYMBeryAUNHDynM25IGSn4fQk5pmA VTkcAcoCRwM+2vKazzC52qq71AmrnfB8Oc6KgA+ayo4fhRabQkyDPrEjTbLBkActAQ huWBKCeodfluA== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: <20221026190441.4002212-1-quic_molvera@quicinc.com> <20221026190441.4002212-2-quic_molvera@quicinc.com> Subject: Re: [PATCH v3 1/5] dt-bindings: clock: Add QDU1000 and QRU1000 GCC clock bindings From: Stephen Boyd Cc: Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Krzysztof Kozlowski , Marc Zyngier , Melody Olvera , Michael Turquette , Rob Herring , Thomas Gleixner Date: Thu, 27 Oct 2022 11:24:45 -0700 User-Agent: alot/0.10 Message-Id: <20221027182449.366AEC433D6@smtp.kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Quoting Krzysztof Kozlowski (2022-10-27 08:54:51) > On 26/10/2022 15:04, Melody Olvera wrote: > > +description: | > > + Qualcomm global clock control module which supports the clocks, rese= ts and > > + power domains on QDU1000 and QRU1000 > > + > > + See also: > > + - include/dt-bindings/clock/qcom,gcc-qdu1000.h > > + > > +properties: > > + compatible: > > + items: > > + - const: qcom,gcc-qdu1000 > > + - const: syscon > > + > > + clocks: > > + items: > > + - description: Board XO source > > + - description: Sleep clock source > > + - description: PCIE 0 Pipe clock source > > + - description: PCIE 0 Phy Auxiliary clock source > > + - description: USB3 Phy wrapper pipe clock source > > + minItems: 2 >=20 > Why the clocks are optional? They should not be optional. They're always there.