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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id be27-20020a056808219b00b00339befdfad0sm2740916oib.50.2022.10.31.14.40.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Oct 2022 14:40:54 -0700 (PDT) Received: (nullmailer pid 3617874 invoked by uid 1000); Mon, 31 Oct 2022 21:40:55 -0000 Date: Mon, 31 Oct 2022 16:40:55 -0500 From: Rob Herring To: Dmitry Baryshkov Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Johan Hovold , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH v1 1/7] dt-bindings: PCI: qcom: Add sm8350 to bindings Message-ID: <20221031214055.GA3613285-robh@kernel.org> References: <20221029211312.929862-1-dmitry.baryshkov@linaro.org> <20221029211312.929862-2-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221029211312.929862-2-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sun, Oct 30, 2022 at 12:13:06AM +0300, Dmitry Baryshkov wrote: > Add bindings for two PCIe hosts on SM8350 platform. The only difference > between them is in the aggre0 clock, which warrants the oneOf clause for > the clocks properties. > > Signed-off-by: Dmitry Baryshkov > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 54f07852d279..55bf5958ef79 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -32,6 +32,7 @@ properties: > - qcom,pcie-sdm845 > - qcom,pcie-sm8150 > - qcom,pcie-sm8250 > + - qcom,pcie-sm8350 > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > - qcom,pcie-ipq6018 > @@ -185,6 +186,7 @@ allOf: > - qcom,pcie-sc8180x > - qcom,pcie-sc8280xp > - qcom,pcie-sm8250 > + - qcom,pcie-sm8350 > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > then: > @@ -540,6 +542,57 @@ allOf: > items: > - const: pci # PCIe core reset > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,pcie-sm8350 > + then: > + oneOf: > + # Unfortunately the "optional" ref clock is used in the middle of the list > + - properties: > + clocks: > + maxItems: 13 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: pipe_mux # PIPE MUX > + - const: phy_pipe # PIPE output clock > + - const: ref # REFERENCE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: tbu # PCIe TBU clock > + - const: ddrss_sf_tbu # PCIe SF TBU clock > + - const: aggre0 # Aggre NoC PCIe0 AXI clock 'enum: [ aggre0, aggre1 ]' and 'minItems: 12' would eliminate the 2nd case. There's a implicit requirement that string names are unique (by default). > + - const: aggre1 # Aggre NoC PCIe1 AXI clock > + - properties: > + clocks: > + maxItems: 12 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: pipe_mux # PIPE MUX > + - const: phy_pipe # PIPE output clock > + - const: ref # REFERENCE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: tbu # PCIe TBU clock > + - const: ddrss_sf_tbu # PCIe SF TBU clock > + - const: aggre1 # Aggre NoC PCIe1 AXI clock > + properties: > + resets: > + maxItems: 1 > + reset-names: > + items: > + - const: pci # PCIe core reset > + > - if: > properties: > compatible: > @@ -670,6 +723,7 @@ allOf: > - qcom,pcie-sdm845 > - qcom,pcie-sm8150 > - qcom,pcie-sm8250 > + - qcom,pcie-sm8350 > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > then: > -- > 2.35.1 > >