[PATCH v2 0/6] Support new features to the SPEAr600

[PATCH v2 0/6] Support new features to the SPEAr600

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

This patches series adds two features of the SPEAr600 SOC:

- Enable the display controller

- Enable the SPI buses using the SSP controller

Changes in v2:
- Keep the I2C_CONFIG in the spear6xx_defconfig while enabling DRM.
- Send cover letter which was not sent in v1 due to a mistake in my git
  mail config.

Viresh, will you take the patches and submit a pull request to the ARM SoC
maintainers?

Kory Maincent (6):
  arm: configs: spear6xx: Refresh defconfig
  arm: dts: spear600: Fix clcd interrupt
  arm: configs: spear6xx: Enable PL110 display controller
  clk: spear: Fix CLCD clock definition on SPEAr600
  arm: dts: spear600: Add ssp controller nodes
  clk: spear: Fix SSP clock definition on SPEAr600

 arch/arm/boot/dts/spear600.dtsi     | 32 ++++++++++++++++++++++++++++-
 arch/arm/configs/spear6xx_defconfig |  7 ++-----
 drivers/clk/spear/spear6xx_clock.c  |  8 ++++----
 3 files changed, 37 insertions(+), 10 deletions(-)

-- 
2.25.1

[PATCH v2 1/6] arm: configs: spear6xx: Refresh defconfig

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

Refresh the defconfig to follow the changes made over the year.
I ensure important options have not gone away.
I drop the gpio sysfs config as it is useless to keep it alone without
CONFIG_EXPERT.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
---
 arch/arm/configs/spear6xx_defconfig | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
index 3d631b1f3cfa..1cf0621d2154 100644
--- a/arch/arm/configs/spear6xx_defconfig
+++ b/arch/arm/configs/spear6xx_defconfig
@@ -11,7 +11,6 @@ CONFIG_PARTITION_ADVANCED=y
 CONFIG_BINFMT_MISC=y
 CONFIG_NET=y
 CONFIG_MTD=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_MTD_NAND_FSMC=y
@@ -28,19 +27,15 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_VENDOR_SMSC is not set
 CONFIG_STMMAC_ETH=y
 # CONFIG_WLAN is not set
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_RAW_DRIVER=y
 CONFIG_I2C=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_SPI=y
 CONFIG_SPI_PL022=y
-CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-- 
2.25.1

Re: [PATCH v2 1/6] arm: configs: spear6xx: Refresh defconfig

[Viresh Kumar]

On 02-11-22, 18:10, Köry Maincent wrote:
> From: Kory Maincent <kory.maincent@bootlin.com>
> 
> Refresh the defconfig to follow the changes made over the year.
> I ensure important options have not gone away.
> I drop the gpio sysfs config as it is useless to keep it alone without
> CONFIG_EXPERT.
> 
> Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
> ---
>  arch/arm/configs/spear6xx_defconfig | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
> index 3d631b1f3cfa..1cf0621d2154 100644
> --- a/arch/arm/configs/spear6xx_defconfig
> +++ b/arch/arm/configs/spear6xx_defconfig
> @@ -11,7 +11,6 @@ CONFIG_PARTITION_ADVANCED=y
>  CONFIG_BINFMT_MISC=y
>  CONFIG_NET=y
>  CONFIG_MTD=y
> -CONFIG_MTD_OF_PARTS=y
>  CONFIG_MTD_BLOCK=y
>  CONFIG_MTD_RAW_NAND=y
>  CONFIG_MTD_NAND_FSMC=y
> @@ -28,19 +27,15 @@ CONFIG_NETDEVICES=y
>  # CONFIG_NET_VENDOR_SMSC is not set
>  CONFIG_STMMAC_ETH=y
>  # CONFIG_WLAN is not set
> -CONFIG_INPUT_FF_MEMLESS=y
> -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
>  # CONFIG_INPUT_KEYBOARD is not set
>  # CONFIG_INPUT_MOUSE is not set
>  # CONFIG_LEGACY_PTYS is not set
>  CONFIG_SERIAL_AMBA_PL011=y
>  CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
> -CONFIG_RAW_DRIVER=y
>  CONFIG_I2C=y
>  CONFIG_I2C_DESIGNWARE_PLATFORM=y
>  CONFIG_SPI=y
>  CONFIG_SPI_PL022=y
> -CONFIG_GPIO_SYSFS=y
>  CONFIG_GPIO_PL061=y
>  # CONFIG_HWMON is not set
>  CONFIG_WATCHDOG=y

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

[PATCH v2 2/6] arm: dts: spear600: Fix clcd interrupt

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

Interrupt 12 of the Interrupt controller belongs to the SMI controller,
the right one for the display controller is the interrupt 13.

Fixes: 8113ba917dfa ("ARM: SPEAr: DT: Update device nodes")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 arch/arm/boot/dts/spear600.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index fd41243a0b2c..9d5a04a46b14 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -47,7 +47,7 @@ clcd: clcd@fc200000 {
 			compatible = "arm,pl110", "arm,primecell";
 			reg = <0xfc200000 0x1000>;
 			interrupt-parent = <&vic1>;
-			interrupts = <12>;
+			interrupts = <13>;
 			status = "disabled";
 		};
 
-- 
2.25.1

[PATCH v2 3/6] arm: configs: spear6xx: Enable PL110 display controller

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

Enable the PL110 DRM driver, used by the spear600.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
---

Notes:
    Changes since v1:
    - Do not drop CONFIG_I2C

 arch/arm/configs/spear6xx_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
index 1cf0621d2154..3e2c2abae5ba 100644
--- a/arch/arm/configs/spear6xx_defconfig
+++ b/arch/arm/configs/spear6xx_defconfig
@@ -40,6 +40,8 @@ CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_DRM=y
+CONFIG_DRM_PL111=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
-- 
2.25.1

Re: [PATCH v2 3/6] arm: configs: spear6xx: Enable PL110 display controller

[Viresh Kumar]

On 02-11-22, 18:10, Köry Maincent wrote:
> From: Kory Maincent <kory.maincent@bootlin.com>
> 
> Enable the PL110 DRM driver, used by the spear600.
> 
> Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
> ---
> 
> Notes:
>     Changes since v1:
>     - Do not drop CONFIG_I2C
> 
>  arch/arm/configs/spear6xx_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
> index 1cf0621d2154..3e2c2abae5ba 100644
> --- a/arch/arm/configs/spear6xx_defconfig
> +++ b/arch/arm/configs/spear6xx_defconfig
> @@ -40,6 +40,8 @@ CONFIG_GPIO_PL061=y
>  # CONFIG_HWMON is not set
>  CONFIG_WATCHDOG=y
>  CONFIG_ARM_SP805_WATCHDOG=y
> +CONFIG_DRM=y
> +CONFIG_DRM_PL111=y
>  CONFIG_USB=y
>  CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_OHCI_HCD=y

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

Re: [PATCH v2 3/6] arm: configs: spear6xx: Enable PL110 display controller

[Linus Walleij]

On Wed, Nov 2, 2022 at 6:10 PM Köry Maincent <kory.maincent@bootlin.com> wrote:

> From: Kory Maincent <kory.maincent@bootlin.com>
>
> Enable the PL110 DRM driver, used by the spear600.
>
> Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Thanks for using the DRM driver!

Yours,
Linus Walleij

[PATCH v2 4/6] clk: spear: Fix CLCD clock definition on SPEAr600

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

There is no SPEAr600 device named "clcd". Instead, the description of the
CLCD (color liquid crystal display controller) name is "fc200000.clcd", so
we should associate the CLCD gateable clock to this device name.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 drivers/clk/spear/spear6xx_clock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index c192a9141b86..ee0ed89f2954 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -207,7 +207,7 @@ void __init spear6xx_clk_init(void __iomem *misc_base)
 
 	clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0,
 			PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock);
-	clk_register_clkdev(clk, NULL, "clcd");
+	clk_register_clkdev(clk, NULL, "fc200000.clcd");
 
 	/* gpt clocks */
 	clk = clk_register_gpt("gpt0_1_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG,
-- 
2.25.1

[PATCH v2 5/6] arm: dts: spear600: Add ssp controller nodes

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

The SPEAr600 has three Synchronous serial port to enables synchronous
serial communication with slave or master peripherals (SPI). Lets add these
nodes to be able to use them.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 arch/arm/boot/dts/spear600.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 9d5a04a46b14..6b67c0ceaed9 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -207,6 +207,36 @@ adc: adc@d820b000 {
 				interrupts = <6>;
 				status = "disabled";
 			};
+
+			ssp1: spi@d0100000 {
+				compatible = "arm,pl022", "arm,primecell";
+				reg = <0xd0100000 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupt-parent = <&vic0>;
+				interrupts = <26>;
+				status = "disabled";
+			};
+
+			ssp2: spi@d0180000 {
+				compatible = "arm,pl022", "arm,primecell";
+				reg = <0xd0180000 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupt-parent = <&vic0>;
+				interrupts = <27>;
+				status = "disabled";
+			};
+
+			ssp3: spi@d8180000 {
+				compatible = "arm,pl022", "arm,primecell";
+				reg = <0xd8180000 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupt-parent = <&vic1>;
+				interrupts = <5>;
+				status = "disabled";
+			};
 		};
 	};
 };
-- 
2.25.1

[PATCH v2 6/6] clk: spear: Fix SSP clock definition on SPEAr600

[Köry Maincent]

From: Kory Maincent <kory.maincent@bootlin.com>

There is no SPEAr600 device named "ssp-pl022.x". Instead, the description
of the SSP (Synchronous Serial Port) was recently added to the Device Tree,
and the device name is "xxx.spi", so we should associate the SSP gateable
clock to these device names.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 drivers/clk/spear/spear6xx_clock.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index ee0ed89f2954..adfa118520c3 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -326,13 +326,13 @@ void __init spear6xx_clk_init(void __iomem *misc_base)
 
 	clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,
 			SSP0_CLK_ENB, 0, &_lock);
-	clk_register_clkdev(clk, NULL, "ssp-pl022.0");
+	clk_register_clkdev(clk, NULL, "d0100000.spi");
 
 	clk = clk_register_gate(NULL, "ssp1_clk", "apb_clk", 0, PERIP1_CLK_ENB,
 			SSP1_CLK_ENB, 0, &_lock);
-	clk_register_clkdev(clk, NULL, "ssp-pl022.1");
+	clk_register_clkdev(clk, NULL, "d0180000.spi");
 
 	clk = clk_register_gate(NULL, "ssp2_clk", "apb_clk", 0, PERIP1_CLK_ENB,
 			SSP2_CLK_ENB, 0, &_lock);
-	clk_register_clkdev(clk, NULL, "ssp-pl022.2");
+	clk_register_clkdev(clk, NULL, "d8180000.spi");
 }
-- 
2.25.1

Re: [PATCH v2 0/6] Support new features to the SPEAr600

[Arnd Bergmann]

On Wed, Nov 2, 2022, at 18:10, Köry Maincent wrote:
> From: Kory Maincent <kory.maincent@bootlin.com>
>
> This patches series adds two features of the SPEAr600 SOC:
>
> - Enable the display controller
>
> - Enable the SPI buses using the SSP controller
>
> Changes in v2:
> - Keep the I2C_CONFIG in the spear6xx_defconfig while enabling DRM.
> - Send cover letter which was not sent in v1 due to a mistake in my git
>   mail config.
>
> Viresh, will you take the patches and submit a pull request to the ARM SoC
> maintainers?
>
> Kory Maincent (6):
>   arm: configs: spear6xx: Refresh defconfig
>   arm: dts: spear600: Fix clcd interrupt
>   arm: configs: spear6xx: Enable PL110 display controller
>   clk: spear: Fix CLCD clock definition on SPEAr600
>   arm: dts: spear600: Add ssp controller nodes
>   clk: spear: Fix SSP clock definition on SPEAr600

I've picked up patches 1 and 3 into the arm/defconfig branch,
and patches 2 and 5 into the soc/dt branch now.

I can also take patches 4 and 6, but I think it's better to have
them merged through the clk tree.

Maybe resend them to just the clk maintainers.

       Arnd