From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7BD7C4332F for ; Thu, 3 Nov 2022 20:46:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230222AbiKCUqD (ORCPT ); Thu, 3 Nov 2022 16:46:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230094AbiKCUqB (ORCPT ); Thu, 3 Nov 2022 16:46:01 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BA2620BF0; Thu, 3 Nov 2022 13:46:01 -0700 (PDT) Received: from notapiano (unknown [IPv6:2600:4041:5b1a:cd00:524d:e95d:1a9c:492a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id BC4E9660295F; Thu, 3 Nov 2022 20:45:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1667508359; bh=ISVrpYt4PR/qsbbqqG5f/trgN2UjQtmT5vQsGuTNWYQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=aPffSOWHfvf3cv7PtJFElqX+kIJyAs5RUE5oMEjV9GXiGcZsze8QTHbE4ouhQedUN bnO4/UoNxjIMaeETlEinj3tg6typI5IjS4OJF2CgxBYKtrgJOcgfIJ4m898oekR9aS ArbRbzSExbF8FzJ/U4nEkpUvKJG3QPpBqZVY5VqsWJJcBxIC6Ni9+sI3aM7W9kqg2v 6orABOsR2DhsSCFMXEcZDai78MVOp+N2ia8JV18M0W9LuzcJFlMlNolxpqVZ6Pu6bD Sb9pYH/MkEIavj3ibVF9UQfQ6vNmvrqj4ObF3cGK/pVIDR5d8AHySEo9EE59mDt2fm B/a6hGxIi8Q+g== Date: Thu, 3 Nov 2022 16:45:52 -0400 From: =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado To: "Nancy.Lin" Cc: Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , wim@linux-watchdog.org, AngeloGioacchino Del Regno , linux@roeck-us.net, David Airlie , Daniel Vetter , Nathan Chancellor , Nick Desaulniers , "jason-jh . lin" , Yongqiang Niu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, llvm@lists.linux.dev, singo.chang@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com Subject: Re: [PATCH v27 08/11] soc: mediatek: mmsys: add mmsys for support 64 reset bits Message-ID: <20221103204552.5aklyrn7mbdhxw63@notapiano> References: <20221103032512.9144-1-nancy.lin@mediatek.com> <20221103032512.9144-9-nancy.lin@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20221103032512.9144-9-nancy.lin@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Nov 03, 2022 at 11:25:09AM +0800, Nancy.Lin wrote: > Add mmsys for support 64 reset bits. It is a preparation for MT8195 > vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits. > > 1. Add the number of reset bits in mmsys private data > 2. move the whole "reset register code section" behind the > "get mmsys->data" code section for getting the num_resets in mmsys->data. > > Signed-off-by: Nancy.Lin > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: CK Hu > Tested-by: Bo-Chen Chen > Change-Id: Ic7c30ad6c4f74a6b2ebf75fc0e3f9f207b0416d1 Again, no Change-Id please. Reviewed-by: Nícolas F. R. A. Prado Thanks, Nícolas