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Fri, 25 Nov 2022 08:13:51 -0800 (PST) Received: from p14s ([2604:3d09:148c:c800:fd14:ad8b:6b7b:c61]) by smtp.gmail.com with ESMTPSA id s10-20020a170902ea0a00b0017c19d7c89bsm3577384plg.269.2022.11.25.08.13.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 08:13:50 -0800 (PST) Date: Fri, 25 Nov 2022 09:13:47 -0700 From: Mathieu Poirier To: Michal Simek Cc: Tanmay Shah , andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bill.mills@linaro.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v11 2/6] arm64: dts: xilinx: zynqmp: Add RPU subsystem device node Message-ID: <20221125161347.GA764010@p14s> References: <20221114233940.2096237-1-tanmay.shah@amd.com> <20221114233940.2096237-3-tanmay.shah@amd.com> <90fbb273-510b-279f-1582-8336136c5a0c@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <90fbb273-510b-279f-1582-8336136c5a0c@amd.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Nov 25, 2022 at 10:22:47AM +0100, Michal Simek wrote: > > > On 11/15/22 00:39, Tanmay Shah wrote: > > RPU subsystem can be configured in cluster-mode or split mode. > > Also each r5 core has separate power domains. > > > > Signed-off-by: Tanmay Shah > > --- > > > > Changes in v11: > > - None > > > > Changes in v10: > > - Rename node name to remoteproc > > > > Changes in v9: > > - remove unused labels > > > > Changes in v8: > > - None > > > > Changes in v7: > > - None > > > > Changes in v6: > > - None > > > > Changes in v5: > > - Remove optional reg property from r5fss node > > - Move r5fss node out of axi node > > > > Changes in v4: > > - Add reserved memory region node and use it in RPU subsystem node > > > > Changes in v3: > > - Fix checkpatch.pl style warning > > > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 ++++++++++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > index a549265e55f6..c0f60833c0ae 100644 > > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > @@ -100,6 +100,22 @@ opp03 { > > }; > > }; > > + reserved-memory { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + > > + rproc_0_fw_image: memory@3ed00000 { > > + no-map; > > + reg = <0x0 0x3ed00000 0x0 0x40000>; > > + }; > > + > > + rproc_1_fw_image: memory@3ef00000 { > > + no-map; > > + reg = <0x0 0x3ef00000 0x0 0x40000>; > > + }; > > + }; > > + > > zynqmp_ipi: zynqmp_ipi { > > compatible = "xlnx,zynqmp-ipi-mailbox"; > > interrupt-parent = <&gic>; > > @@ -203,6 +219,23 @@ fpga_full: fpga-full { > > ranges; > > }; > > + remoteproc { > > + compatible = "xlnx,zynqmp-r5fss"; > > + xlnx,cluster-mode = <1>; > > + > > + r5f-0 { > > + compatible = "xlnx,zynqmp-r5f"; > > + power-domains = <&zynqmp_firmware PD_RPU_0>; > > + memory-region = <&rproc_0_fw_image>; > > + }; > > + > > + r5f-1 { > > + compatible = "xlnx,zynqmp-r5f"; > > + power-domains = <&zynqmp_firmware PD_RPU_1>; > > + memory-region = <&rproc_1_fw_image>; > > + }; > > + }; > > + > > amba: axi { > > compatible = "simple-bus"; > > #address-cells = <2>; > > Matthieu: If you want to take this via your tree here is mine. > > Acked-by: Michal Simek I have applied the whole set. Thanks, Mathieu > > In another case I will queue it for next release when dt binding is applied. > > Thanks, > Michal