[PATCH 0/5] clk: sunxi-ng: Allwinner R528/T113 clock support

[PATCH 0/5] clk: sunxi-ng: Allwinner R528/T113 clock support

[Samuel Holland]

R528 and T113 are SoCs based on the same design as D1/D1s, but with ARM
CPUs instead of RISC-V. They use the same CCU implementation, meaning
the CCU has gates/resets for all peripherals present on any SoC in this
family. I verified the CAN bus bits are also present on D1/D1s.

Patches 1-2 clean up the Kconfig in preparation for patch 3, which
allows building the driver. Patches 4-5 add the missing driver bits.


András Szemző (1):
  clk: sunxi-ng: d1: Mark cpux clock as critical

Fabien Poussin (1):
  clk: sunxi-ng: d1: Add CAN bus gates and resets

Samuel Holland (3):
  clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies
  clk: sunxi-ng: Move SoC driver conditions to dependencies
  clk: sunxi-ng: d1: Allow building for R528/T113

 drivers/clk/sunxi-ng/Kconfig              | 71 ++++++++++++-----------
 drivers/clk/sunxi-ng/ccu-sun20i-d1.c      | 13 ++++-
 drivers/clk/sunxi-ng/ccu-sun20i-d1.h      |  2 +-
 include/dt-bindings/clock/sun20i-d1-ccu.h |  2 +
 include/dt-bindings/reset/sun20i-d1-ccu.h |  2 +
 5 files changed, 53 insertions(+), 37 deletions(-)

-- 
2.37.4

[PATCH 1/5] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies

[Samuel Holland]

SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
individual SoC drivers is redundant.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/clk/sunxi-ng/Kconfig | 43 ++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 461537679c04..64cfa022e320 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -14,43 +14,43 @@ config SUNIV_F1C100S_CCU
 
 config SUN20I_D1_CCU
 	tristate "Support for the Allwinner D1 CCU"
-	default RISCV && ARCH_SUNXI
-	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
+	default RISCV
+	depends on RISCV || COMPILE_TEST
 
 config SUN20I_D1_R_CCU
 	tristate "Support for the Allwinner D1 PRCM CCU"
-	default RISCV && ARCH_SUNXI
-	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
+	default RISCV
+	depends on RISCV || COMPILE_TEST
 
 config SUN50I_A64_CCU
 	tristate "Support for the Allwinner A64 CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_A100_CCU
 	tristate "Support for the Allwinner A100 CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_A100_R_CCU
 	tristate "Support for the Allwinner A100 PRCM CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H6_CCU
 	tristate "Support for the Allwinner H6 CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H616_CCU
 	tristate "Support for the Allwinner H616 CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H6_R_CCU
 	tristate "Support for the Allwinner H6 and H616 PRCM CCU"
-	default ARM64 && ARCH_SUNXI
-	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default ARM64
+	depends on ARM64 || COMPILE_TEST
 
 config SUN4I_A10_CCU
 	tristate "Support for the Allwinner A10/A20 CCU"
@@ -71,8 +71,7 @@ config SUN6I_A31_CCU
 
 config SUN6I_RTC_CCU
 	tristate "Support for the Allwinner H616/R329 RTC CCU"
-	default ARCH_SUNXI
-	depends on ARCH_SUNXI || COMPILE_TEST
+	default y
 
 config SUN8I_A23_CCU
 	tristate "Support for the Allwinner A23 CCU"
@@ -91,8 +90,8 @@ config SUN8I_A83T_CCU
 
 config SUN8I_H3_CCU
 	tristate "Support for the Allwinner H3 CCU"
-	default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
-	depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	default MACH_SUN8I || ARM64
+	depends on MACH_SUN8I || ARM64 || COMPILE_TEST
 
 config SUN8I_V3S_CCU
 	tristate "Support for the Allwinner V3s CCU"
@@ -101,7 +100,7 @@ config SUN8I_V3S_CCU
 
 config SUN8I_DE2_CCU
 	tristate "Support for the Allwinner SoCs DE2 CCU"
-	default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
+	default MACH_SUN8I || ARM64
 
 config SUN8I_R40_CCU
 	tristate "Support for the Allwinner R40 CCU"
@@ -115,6 +114,6 @@ config SUN9I_A80_CCU
 
 config SUN8I_R_CCU
 	tristate "Support for Allwinner SoCs' PRCM CCUs"
-	default MACH_SUN8I || (ARCH_SUNXI && ARM64)
+	default MACH_SUN8I || ARM64
 
 endif
-- 
2.37.4

Re: [PATCH 1/5] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies

[Andre Przywara]

On Sat, 26 Nov 2022 13:13:15 -0600
Samuel Holland <samuel@sholland.org> wrote:

Hi,

thanks for addressing this!

> SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
> individual SoC drivers is redundant.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>  drivers/clk/sunxi-ng/Kconfig | 43 ++++++++++++++++++------------------
>  1 file changed, 21 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
> index 461537679c04..64cfa022e320 100644
> --- a/drivers/clk/sunxi-ng/Kconfig
> +++ b/drivers/clk/sunxi-ng/Kconfig
> @@ -14,43 +14,43 @@ config SUNIV_F1C100S_CCU
>  
>  config SUN20I_D1_CCU
>  	tristate "Support for the Allwinner D1 CCU"
> -	default RISCV && ARCH_SUNXI
> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
> +	default RISCV
> +	depends on RISCV || COMPILE_TEST

I agree on the "depends" part: Indeed the guard symbol already covers
that, so it's redundant.
However I am not so sure about the "default" part: When ARCH_SUNXI is
deselected, but COMPILE_TEST in enabled, we default to every CCU driver
being built-in. I am not sure this is the intention, or at least
expected when doing compile testing?

>  
>  config SUN20I_D1_R_CCU
>  	tristate "Support for the Allwinner D1 PRCM CCU"
> -	default RISCV && ARCH_SUNXI
> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
> +	default RISCV
> +	depends on RISCV || COMPILE_TEST
>  
>  config SUN50I_A64_CCU
>  	tristate "Support for the Allwinner A64 CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST

I wonder if this "depends" line was always wrong and should be fixed:
We can compile a 32-bit ARM kernel and run it on an A64. Granted this
requires a special bootloader or a hacked U-Boot (tried that), and
reveals some other issues with the decompressor, but technically there
is no 64-bit dependency in here.
The same goes for all the other ARM64 CCUs: Cortex-A53s can run AArch32
in all exception levels.
So shall we just completely remove the "depends" line for those, and
let SUNXI_CCU do that job? Or use use !RISCV || COMPILE_TEST?

Cheers,
Andre

>  
>  config SUN50I_A100_CCU
>  	tristate "Support for the Allwinner A100 CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST
>  
>  config SUN50I_A100_R_CCU
>  	tristate "Support for the Allwinner A100 PRCM CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST
>  
>  config SUN50I_H6_CCU
>  	tristate "Support for the Allwinner H6 CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST
>  
>  config SUN50I_H616_CCU
>  	tristate "Support for the Allwinner H616 CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST
>  
>  config SUN50I_H6_R_CCU
>  	tristate "Support for the Allwinner H6 and H616 PRCM CCU"
> -	default ARM64 && ARCH_SUNXI
> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default ARM64
> +	depends on ARM64 || COMPILE_TEST
>  
>  config SUN4I_A10_CCU
>  	tristate "Support for the Allwinner A10/A20 CCU"
> @@ -71,8 +71,7 @@ config SUN6I_A31_CCU
>  
>  config SUN6I_RTC_CCU
>  	tristate "Support for the Allwinner H616/R329 RTC CCU"
> -	default ARCH_SUNXI
> -	depends on ARCH_SUNXI || COMPILE_TEST
> +	default y
>  
>  config SUN8I_A23_CCU
>  	tristate "Support for the Allwinner A23 CCU"
> @@ -91,8 +90,8 @@ config SUN8I_A83T_CCU
>  
>  config SUN8I_H3_CCU
>  	tristate "Support for the Allwinner H3 CCU"
> -	default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
> -	depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> +	default MACH_SUN8I || ARM64
> +	depends on MACH_SUN8I || ARM64 || COMPILE_TEST
>  
>  config SUN8I_V3S_CCU
>  	tristate "Support for the Allwinner V3s CCU"
> @@ -101,7 +100,7 @@ config SUN8I_V3S_CCU
>  
>  config SUN8I_DE2_CCU
>  	tristate "Support for the Allwinner SoCs DE2 CCU"
> -	default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
> +	default MACH_SUN8I || ARM64
>  
>  config SUN8I_R40_CCU
>  	tristate "Support for the Allwinner R40 CCU"
> @@ -115,6 +114,6 @@ config SUN9I_A80_CCU
>  
>  config SUN8I_R_CCU
>  	tristate "Support for Allwinner SoCs' PRCM CCUs"
> -	default MACH_SUN8I || (ARCH_SUNXI && ARM64)
> +	default MACH_SUN8I || ARM64
>  
>  endif

Re: [PATCH 1/5] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies

[Samuel Holland]

On 12/2/22 18:14, Andre Przywara wrote:
> On Sat, 26 Nov 2022 13:13:15 -0600
> Samuel Holland <samuel@sholland.org> wrote:
> 
> Hi,
> 
> thanks for addressing this!
> 
>> SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
>> individual SoC drivers is redundant.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>>  drivers/clk/sunxi-ng/Kconfig | 43 ++++++++++++++++++------------------
>>  1 file changed, 21 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
>> index 461537679c04..64cfa022e320 100644
>> --- a/drivers/clk/sunxi-ng/Kconfig
>> +++ b/drivers/clk/sunxi-ng/Kconfig
>> @@ -14,43 +14,43 @@ config SUNIV_F1C100S_CCU
>>  
>>  config SUN20I_D1_CCU
>>  	tristate "Support for the Allwinner D1 CCU"
>> -	default RISCV && ARCH_SUNXI
>> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
>> +	default RISCV
>> +	depends on RISCV || COMPILE_TEST
> 
> I agree on the "depends" part: Indeed the guard symbol already covers
> that, so it's redundant.
> However I am not so sure about the "default" part: When ARCH_SUNXI is
> deselected, but COMPILE_TEST in enabled, we default to every CCU driver
> being built-in. I am not sure this is the intention, or at least
> expected when doing compile testing?

SUNXI_CCU, which these depend on, is still "default ARCH_SUNXI", so if
you have ARCH_SUNXI disabled, you only get any drivers if you manually
enable SUNXI_CCU. I mentioned this in the patch 2 description, but maybe
I should move that comment here.

>>  
>>  config SUN20I_D1_R_CCU
>>  	tristate "Support for the Allwinner D1 PRCM CCU"
>> -	default RISCV && ARCH_SUNXI
>> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
>> +	default RISCV
>> +	depends on RISCV || COMPILE_TEST
>>  
>>  config SUN50I_A64_CCU
>>  	tristate "Support for the Allwinner A64 CCU"
>> -	default ARM64 && ARCH_SUNXI
>> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
>> +	default ARM64
>> +	depends on ARM64 || COMPILE_TEST
> 
> I wonder if this "depends" line was always wrong and should be fixed:
> We can compile a 32-bit ARM kernel and run it on an A64. Granted this
> requires a special bootloader or a hacked U-Boot (tried that), and
> reveals some other issues with the decompressor, but technically there
> is no 64-bit dependency in here.
> The same goes for all the other ARM64 CCUs: Cortex-A53s can run AArch32
> in all exception levels.

I was trying to simplify things by hiding irrelevant options, and you
bring up an edge case of an edge case. :) I am okay with relaxing the
dependency, though I would want to leave them disabled by default for
32-bit kernels (excluding them from the change in patch 2).

> So shall we just completely remove the "depends" line for those, and
> let SUNXI_CCU do that job? Or use use !RISCV || COMPILE_TEST?

That, or we could add MACH_SUN8I to the condition. I don't have a strong
opinion.

Regards,
Samuel

Re: [PATCH 1/5] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies

[Andre Przywara]

On Fri, 2 Dec 2022 19:52:41 -0600
Samuel Holland <samuel@sholland.org> wrote:

Hi Samuel,

> On 12/2/22 18:14, Andre Przywara wrote:
> > On Sat, 26 Nov 2022 13:13:15 -0600
> > Samuel Holland <samuel@sholland.org> wrote:
> > 
> > Hi,
> > 
> > thanks for addressing this!
> >   
> >> SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
> >> individual SoC drivers is redundant.
> >>
> >> Signed-off-by: Samuel Holland <samuel@sholland.org>
> >> ---
> >>
> >>  drivers/clk/sunxi-ng/Kconfig | 43 ++++++++++++++++++------------------
> >>  1 file changed, 21 insertions(+), 22 deletions(-)
> >>
> >> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
> >> index 461537679c04..64cfa022e320 100644
> >> --- a/drivers/clk/sunxi-ng/Kconfig
> >> +++ b/drivers/clk/sunxi-ng/Kconfig
> >> @@ -14,43 +14,43 @@ config SUNIV_F1C100S_CCU
> >>  
> >>  config SUN20I_D1_CCU
> >>  	tristate "Support for the Allwinner D1 CCU"
> >> -	default RISCV && ARCH_SUNXI
> >> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
> >> +	default RISCV
> >> +	depends on RISCV || COMPILE_TEST  
> > 
> > I agree on the "depends" part: Indeed the guard symbol already covers
> > that, so it's redundant.
> > However I am not so sure about the "default" part: When ARCH_SUNXI is
> > deselected, but COMPILE_TEST in enabled, we default to every CCU driver
> > being built-in. I am not sure this is the intention, or at least
> > expected when doing compile testing?  
> 
> SUNXI_CCU, which these depend on, is still "default ARCH_SUNXI", so if
> you have ARCH_SUNXI disabled, you only get any drivers if you manually
> enable SUNXI_CCU. I mentioned this in the patch 2 description, but maybe
> I should move that comment here.

Yeah, I read this later on, I guess it's fine then.

> 
> >>  
> >>  config SUN20I_D1_R_CCU
> >>  	tristate "Support for the Allwinner D1 PRCM CCU"
> >> -	default RISCV && ARCH_SUNXI
> >> -	depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
> >> +	default RISCV
> >> +	depends on RISCV || COMPILE_TEST
> >>  
> >>  config SUN50I_A64_CCU
> >>  	tristate "Support for the Allwinner A64 CCU"
> >> -	default ARM64 && ARCH_SUNXI
> >> -	depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> >> +	default ARM64
> >> +	depends on ARM64 || COMPILE_TEST  
> > 
> > I wonder if this "depends" line was always wrong and should be fixed:
> > We can compile a 32-bit ARM kernel and run it on an A64. Granted this
> > requires a special bootloader or a hacked U-Boot (tried that), and
> > reveals some other issues with the decompressor, but technically there
> > is no 64-bit dependency in here.
> > The same goes for all the other ARM64 CCUs: Cortex-A53s can run AArch32
> > in all exception levels.  
> 
> I was trying to simplify things by hiding irrelevant options, and you
> bring up an edge case of an edge case. :) I am okay with relaxing the
> dependency, though I would want to leave them disabled by default for
> 32-bit kernels (excluding them from the change in patch 2).

Yes, definitely, that was the idea.

And sorry for being a nuisance, but I think this "depends on ARCH_SUNXI"
here is and was always misplaced. In contrast to things like "depends
on PCI" or "depends on GPIOLIB", there is no real dependency on
ARCH_SUNXI or even ARM/RISCV here, it's more a "only useful on
ARCH_SUNXI".
And this ARM vs ARM64 was just another rationale for not being
overzealous with the dependency.

But I see that this is an orthogonal discussion to this patch, so this
should not block it. I will meditate over both patches again, since I
have the gut feeling that the end result is fine.

Cheers,
Andre

> 
> > So shall we just completely remove the "depends" line for those, and
> > let SUNXI_CCU do that job? Or use use !RISCV || COMPILE_TEST?  
> 
> That, or we could add MACH_SUN8I to the condition. I don't have a strong
> opinion.
> 
> Regards,
> Samuel
> 

Re: [PATCH 1/5] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies

[Jernej Škrabec]

Dne sobota, 26. november 2022 ob 20:13:15 CET je Samuel Holland napisal(a):
> SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
> individual SoC drivers is redundant.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 2/5] clk: sunxi-ng: Move SoC driver conditions to dependencies

[Samuel Holland]

Do not duplicate the same expression on the `default` line, so the two
lines do not need to be kept in sync. Drivers stay disabled under
COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU.

Three drivers had no conditions.
 - SUN6I_RTC_CCU and SUN8I_DE2_CCU are used on current hardware
   regardless of CPU architecture.
 - SUN8I_R_CCU is only used on pre-H6 SoCs, which means no RISCV SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/clk/sunxi-ng/Kconfig | 46 +++++++++++++++++++-----------------
 1 file changed, 24 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 64cfa022e320..78deee2996ce 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -9,111 +9,113 @@ if SUNXI_CCU
 
 config SUNIV_F1C100S_CCU
 	tristate "Support for the Allwinner newer F1C100s CCU"
-	default MACH_SUNIV
+	default y
 	depends on MACH_SUNIV || COMPILE_TEST
 
 config SUN20I_D1_CCU
 	tristate "Support for the Allwinner D1 CCU"
-	default RISCV
+	default y
 	depends on RISCV || COMPILE_TEST
 
 config SUN20I_D1_R_CCU
 	tristate "Support for the Allwinner D1 PRCM CCU"
-	default RISCV
+	default y
 	depends on RISCV || COMPILE_TEST
 
 config SUN50I_A64_CCU
 	tristate "Support for the Allwinner A64 CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_A100_CCU
 	tristate "Support for the Allwinner A100 CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_A100_R_CCU
 	tristate "Support for the Allwinner A100 PRCM CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H6_CCU
 	tristate "Support for the Allwinner H6 CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H616_CCU
 	tristate "Support for the Allwinner H616 CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN50I_H6_R_CCU
 	tristate "Support for the Allwinner H6 and H616 PRCM CCU"
-	default ARM64
+	default y
 	depends on ARM64 || COMPILE_TEST
 
 config SUN4I_A10_CCU
 	tristate "Support for the Allwinner A10/A20 CCU"
-	default MACH_SUN4I
-	default MACH_SUN7I
+	default y
 	depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST
 
 config SUN5I_CCU
 	bool "Support for the Allwinner sun5i family CCM"
-	default MACH_SUN5I
+	default y
 	depends on MACH_SUN5I || COMPILE_TEST
 	depends on SUNXI_CCU=y
 
 config SUN6I_A31_CCU
 	tristate "Support for the Allwinner A31/A31s CCU"
-	default MACH_SUN6I
+	default y
 	depends on MACH_SUN6I || COMPILE_TEST
 
 config SUN6I_RTC_CCU
 	tristate "Support for the Allwinner H616/R329 RTC CCU"
 	default y
+	depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
 
 config SUN8I_A23_CCU
 	tristate "Support for the Allwinner A23 CCU"
-	default MACH_SUN8I
+	default y
 	depends on MACH_SUN8I || COMPILE_TEST
 
 config SUN8I_A33_CCU
 	tristate "Support for the Allwinner A33 CCU"
-	default MACH_SUN8I
+	default y
 	depends on MACH_SUN8I || COMPILE_TEST
 
 config SUN8I_A83T_CCU
 	tristate "Support for the Allwinner A83T CCU"
-	default MACH_SUN8I
+	default y
 	depends on MACH_SUN8I || COMPILE_TEST
 
 config SUN8I_H3_CCU
 	tristate "Support for the Allwinner H3 CCU"
-	default MACH_SUN8I || ARM64
+	default y
 	depends on MACH_SUN8I || ARM64 || COMPILE_TEST
 
 config SUN8I_V3S_CCU
 	tristate "Support for the Allwinner V3s CCU"
-	default MACH_SUN8I
+	default y
 	depends on MACH_SUN8I || COMPILE_TEST
 
 config SUN8I_DE2_CCU
 	tristate "Support for the Allwinner SoCs DE2 CCU"
-	default MACH_SUN8I || ARM64
+	default y
+	depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
 
 config SUN8I_R40_CCU
 	tristate "Support for the Allwinner R40 CCU"
-	default MACH_SUN8I
+	default y
 	depends on MACH_SUN8I || COMPILE_TEST
 
 config SUN9I_A80_CCU
 	tristate "Support for the Allwinner A80 CCU"
-	default MACH_SUN9I
+	default y
 	depends on MACH_SUN9I || COMPILE_TEST
 
 config SUN8I_R_CCU
 	tristate "Support for Allwinner SoCs' PRCM CCUs"
-	default MACH_SUN8I || ARM64
+	default y
+	depends on MACH_SUN8I || ARM64 || COMPILE_TEST
 
 endif
-- 
2.37.4

Re: [PATCH 2/5] clk: sunxi-ng: Move SoC driver conditions to dependencies

[Jernej Škrabec]

Dne sobota, 26. november 2022 ob 20:13:16 CET je Samuel Holland napisal(a):
> Do not duplicate the same expression on the `default` line, so the two
> lines do not need to be kept in sync. Drivers stay disabled under
> COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU.
> 
> Three drivers had no conditions.
>  - SUN6I_RTC_CCU and SUN8I_DE2_CCU are used on current hardware
>    regardless of CPU architecture.
>  - SUN8I_R_CCU is only used on pre-H6 SoCs, which means no RISCV SoCs.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 3/5] clk: sunxi-ng: d1: Allow building for R528/T113

[Samuel Holland]

Allwinner released some 32-bit ARM (sun8i) SoCs which use the same CCU
as D1. Allow them to reuse the driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/clk/sunxi-ng/Kconfig | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 78deee2996ce..b547198a2c65 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -13,14 +13,14 @@ config SUNIV_F1C100S_CCU
 	depends on MACH_SUNIV || COMPILE_TEST
 
 config SUN20I_D1_CCU
-	tristate "Support for the Allwinner D1 CCU"
+	tristate "Support for the Allwinner D1/R528/T113 CCU"
 	default y
-	depends on RISCV || COMPILE_TEST
+	depends on MACH_SUN8I || RISCV || COMPILE_TEST
 
 config SUN20I_D1_R_CCU
-	tristate "Support for the Allwinner D1 PRCM CCU"
+	tristate "Support for the Allwinner D1/R528/T113 PRCM CCU"
 	default y
-	depends on RISCV || COMPILE_TEST
+	depends on MACH_SUN8I || RISCV || COMPILE_TEST
 
 config SUN50I_A64_CCU
 	tristate "Support for the Allwinner A64 CCU"
-- 
2.37.4

Re: [PATCH 3/5] clk: sunxi-ng: d1: Allow building for R528/T113

[Andre Przywara]

On Sat, 26 Nov 2022 13:13:17 -0600
Samuel Holland <samuel@sholland.org> wrote:

> Allwinner released some 32-bit ARM (sun8i) SoCs which use the same CCU
> as D1. Allow them to reuse the driver.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Indeed, the clocks are compatible, work (given the next patch) and are
needed on a MangoPi-MQ-R board.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
> 
>  drivers/clk/sunxi-ng/Kconfig | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
> index 78deee2996ce..b547198a2c65 100644
> --- a/drivers/clk/sunxi-ng/Kconfig
> +++ b/drivers/clk/sunxi-ng/Kconfig
> @@ -13,14 +13,14 @@ config SUNIV_F1C100S_CCU
>  	depends on MACH_SUNIV || COMPILE_TEST
>  
>  config SUN20I_D1_CCU
> -	tristate "Support for the Allwinner D1 CCU"
> +	tristate "Support for the Allwinner D1/R528/T113 CCU"
>  	default y
> -	depends on RISCV || COMPILE_TEST
> +	depends on MACH_SUN8I || RISCV || COMPILE_TEST
>  
>  config SUN20I_D1_R_CCU
> -	tristate "Support for the Allwinner D1 PRCM CCU"
> +	tristate "Support for the Allwinner D1/R528/T113 PRCM CCU"
>  	default y
> -	depends on RISCV || COMPILE_TEST
> +	depends on MACH_SUN8I || RISCV || COMPILE_TEST
>  
>  config SUN50I_A64_CCU
>  	tristate "Support for the Allwinner A64 CCU"

Re: [PATCH 3/5] clk: sunxi-ng: d1: Allow building for R528/T113

[Jernej Škrabec]

Dne sobota, 26. november 2022 ob 20:13:17 CET je Samuel Holland napisal(a):
> Allwinner released some 32-bit ARM (sun8i) SoCs which use the same CCU
> as D1. Allow them to reuse the driver.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 4/5] clk: sunxi-ng: d1: Mark cpux clock as critical

[Samuel Holland]

From: András Szemző <szemzo.andras@gmail.com>

Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU.
In that case, the CPUs are driven from the 'cpux' clock, so it needs
to be marked as critical.

Signed-off-by: András Szemző <szemzo.andras@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
index 8ef3cdeb7962..c5a7df93602c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
@@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = {
 	{ .hw = &pll_periph0_800M_clk.common.hw },
 };
 static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents,
-			  0x500, 24, 3, CLK_SET_RATE_PARENT);
+			  0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
 
 static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw };
 static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi",
-- 
2.37.4

Re: [PATCH 4/5] clk: sunxi-ng: d1: Mark cpux clock as critical

[Andre Przywara]

On Sat, 26 Nov 2022 13:13:18 -0600
Samuel Holland <samuel@sholland.org> wrote:

> From: András Szemző <szemzo.andras@gmail.com>
> 
> Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU.
> In that case, the CPUs are driven from the 'cpux' clock, so it needs
> to be marked as critical.

Yes, my board hangs without that patch somewhere into the boot, and
this patch fixes it.

Can you also explain in the commit message why this is needed? IIRC
the CPU node itself does not "consume" the clock, this would only be
done by DVFS code?
And it might be worth noting that we do this for every other
Allwinner SoC as well.

> Signed-off-by: András Szemző <szemzo.andras@gmail.com>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
> 
>  drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> index 8ef3cdeb7962..c5a7df93602c 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> @@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = {
>  	{ .hw = &pll_periph0_800M_clk.common.hw },
>  };
>  static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents,
> -			  0x500, 24, 3, CLK_SET_RATE_PARENT);
> +			  0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
>  
>  static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw };
>  static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi",

Re: [PATCH 4/5] clk: sunxi-ng: d1: Mark cpux clock as critical

[Jernej Škrabec]

Dne sobota, 26. november 2022 ob 20:13:18 CET je Samuel Holland napisal(a):
> From: András Szemző <szemzo.andras@gmail.com>
> 
> Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU.
> In that case, the CPUs are driven from the 'cpux' clock, so it needs
> to be marked as critical.
> 
> Signed-off-by: András Szemző <szemzo.andras@gmail.com>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 5/5] clk: sunxi-ng: d1: Add CAN bus gates and resets

[Samuel Holland]

From: Fabien Poussin <fabien.poussin@gmail.com>

The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Signed-off-by: Fabien Poussin <fabien.poussin@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/clk/sunxi-ng/ccu-sun20i-d1.c      | 11 +++++++++++
 drivers/clk/sunxi-ng/ccu-sun20i-d1.h      |  2 +-
 include/dt-bindings/clock/sun20i-d1-ccu.h |  2 ++
 include/dt-bindings/reset/sun20i-d1-ccu.h |  2 ++
 4 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
index c5a7df93602c..48a8fb2c43b7 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
@@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws,
 static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws,
 			  0x91c, BIT(3), 0);
 
+static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws,
+			  0x92c, BIT(0), 0);
+static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws,
+			  0x92c, BIT(1), 0);
+
 static const struct clk_parent_data spi_parents[] = {
 	{ .fw_name = "hosc" },
 	{ .hw = &pll_periph0_clk.hw },
@@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = {
 	&bus_i2c1_clk.common,
 	&bus_i2c2_clk.common,
 	&bus_i2c3_clk.common,
+	&bus_can0_clk.common,
+	&bus_can1_clk.common,
 	&spi0_clk.common,
 	&spi1_clk.common,
 	&bus_spi0_clk.common,
@@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = {
 		[CLK_BUS_I2C1]		= &bus_i2c1_clk.common.hw,
 		[CLK_BUS_I2C2]		= &bus_i2c2_clk.common.hw,
 		[CLK_BUS_I2C3]		= &bus_i2c3_clk.common.hw,
+		[CLK_BUS_CAN0]		= &bus_can0_clk.common.hw,
+		[CLK_BUS_CAN1]		= &bus_can1_clk.common.hw,
 		[CLK_SPI0]		= &spi0_clk.common.hw,
 		[CLK_SPI1]		= &spi1_clk.common.hw,
 		[CLK_BUS_SPI0]		= &bus_spi0_clk.common.hw,
@@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = {
 	[RST_BUS_I2C1]		= { 0x91c, BIT(17) },
 	[RST_BUS_I2C2]		= { 0x91c, BIT(18) },
 	[RST_BUS_I2C3]		= { 0x91c, BIT(19) },
+	[RST_BUS_CAN0]		= { 0x92c, BIT(16) },
+	[RST_BUS_CAN1]		= { 0x92c, BIT(17) },
 	[RST_BUS_SPI0]		= { 0x96c, BIT(16) },
 	[RST_BUS_SPI1]		= { 0x96c, BIT(17) },
 	[RST_BUS_EMAC]		= { 0x97c, BIT(16) },
diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
index e303176f0d4e..b14da36e2537 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
@@ -10,6 +10,6 @@
 #include <dt-bindings/clock/sun20i-d1-ccu.h>
 #include <dt-bindings/reset/sun20i-d1-ccu.h>
 
-#define CLK_NUMBER		(CLK_FANOUT2 + 1)
+#define CLK_NUMBER		(CLK_BUS_CAN1 + 1)
 
 #endif /* _CCU_SUN20I_D1_H_ */
diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h b/include/dt-bindings/clock/sun20i-d1-ccu.h
index e3ac53315e1a..e143b9929763 100644
--- a/include/dt-bindings/clock/sun20i-d1-ccu.h
+++ b/include/dt-bindings/clock/sun20i-d1-ccu.h
@@ -152,5 +152,7 @@
 #define CLK_FANOUT0		142
 #define CLK_FANOUT1		143
 #define CLK_FANOUT2		144
+#define CLK_BUS_CAN0		145
+#define CLK_BUS_CAN1		146
 
 #endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */
diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h
index de9ff5203239..f8001cf50bf1 100644
--- a/include/dt-bindings/reset/sun20i-d1-ccu.h
+++ b/include/dt-bindings/reset/sun20i-d1-ccu.h
@@ -73,5 +73,7 @@
 #define RST_BUS_DSP_CFG		63
 #define RST_BUS_DSP_DBG		64
 #define RST_BUS_RISCV_CFG	65
+#define RST_BUS_CAN0		66
+#define RST_BUS_CAN1		67
 
 #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */
-- 
2.37.4

Re: [PATCH 5/5] clk: sunxi-ng: d1: Add CAN bus gates and resets

[Krzysztof Kozlowski]

On 26/11/2022 20:13, Samuel Holland wrote:
> From: Fabien Poussin <fabien.poussin@gmail.com>
> 
> The D1 CCU contains gates and resets for two CAN buses. While the CAN
> bus controllers are only documented for the T113 SoC, the CCU is the
> same across all SoC variants.
> 
> Signed-off-by: Fabien Poussin <fabien.poussin@gmail.com>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>  drivers/clk/sunxi-ng/ccu-sun20i-d1.c      | 11 +++++++++++
>  drivers/clk/sunxi-ng/ccu-sun20i-d1.h      |  2 +-
>  include/dt-bindings/clock/sun20i-d1-ccu.h |  2 ++
>  include/dt-bindings/reset/sun20i-d1-ccu.h |  2 ++

Don't mix bindings with driver changes. Checkpatch should complain here...

Best regards,
Krzysztof

Re: [PATCH 5/5] clk: sunxi-ng: d1: Add CAN bus gates and resets

[Andre Przywara]

On Sat, 26 Nov 2022 13:13:19 -0600
Samuel Holland <samuel@sholland.org> wrote:

Hi,

> From: Fabien Poussin <fabien.poussin@gmail.com>
> 
> The D1 CCU contains gates and resets for two CAN buses. While the CAN
> bus controllers are only documented for the T113 SoC, the CCU is the
> same across all SoC variants.

So my version of the T113 manual only barely mentions the existence of
CAN controllers, but doesn't list any details, not even a base address
or those clock gates.
However I can confirm that the two lowest bits are implemented in
+0x92c. I also verified that the bits and numbers below match up.

> Signed-off-by: Fabien Poussin <fabien.poussin@gmail.com>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
> 
>  drivers/clk/sunxi-ng/ccu-sun20i-d1.c      | 11 +++++++++++
>  drivers/clk/sunxi-ng/ccu-sun20i-d1.h      |  2 +-
>  include/dt-bindings/clock/sun20i-d1-ccu.h |  2 ++
>  include/dt-bindings/reset/sun20i-d1-ccu.h |  2 ++
>  4 files changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> index c5a7df93602c..48a8fb2c43b7 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
> @@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws,
>  static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws,
>  			  0x91c, BIT(3), 0);
>  
> +static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws,
> +			  0x92c, BIT(0), 0);
> +static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws,
> +			  0x92c, BIT(1), 0);
> +
>  static const struct clk_parent_data spi_parents[] = {
>  	{ .fw_name = "hosc" },
>  	{ .hw = &pll_periph0_clk.hw },
> @@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = {
>  	&bus_i2c1_clk.common,
>  	&bus_i2c2_clk.common,
>  	&bus_i2c3_clk.common,
> +	&bus_can0_clk.common,
> +	&bus_can1_clk.common,
>  	&spi0_clk.common,
>  	&spi1_clk.common,
>  	&bus_spi0_clk.common,
> @@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = {
>  		[CLK_BUS_I2C1]		= &bus_i2c1_clk.common.hw,
>  		[CLK_BUS_I2C2]		= &bus_i2c2_clk.common.hw,
>  		[CLK_BUS_I2C3]		= &bus_i2c3_clk.common.hw,
> +		[CLK_BUS_CAN0]		= &bus_can0_clk.common.hw,
> +		[CLK_BUS_CAN1]		= &bus_can1_clk.common.hw,
>  		[CLK_SPI0]		= &spi0_clk.common.hw,
>  		[CLK_SPI1]		= &spi1_clk.common.hw,
>  		[CLK_BUS_SPI0]		= &bus_spi0_clk.common.hw,
> @@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = {
>  	[RST_BUS_I2C1]		= { 0x91c, BIT(17) },
>  	[RST_BUS_I2C2]		= { 0x91c, BIT(18) },
>  	[RST_BUS_I2C3]		= { 0x91c, BIT(19) },
> +	[RST_BUS_CAN0]		= { 0x92c, BIT(16) },
> +	[RST_BUS_CAN1]		= { 0x92c, BIT(17) },
>  	[RST_BUS_SPI0]		= { 0x96c, BIT(16) },
>  	[RST_BUS_SPI1]		= { 0x96c, BIT(17) },
>  	[RST_BUS_EMAC]		= { 0x97c, BIT(16) },
> diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
> index e303176f0d4e..b14da36e2537 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
> +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
> @@ -10,6 +10,6 @@
>  #include <dt-bindings/clock/sun20i-d1-ccu.h>
>  #include <dt-bindings/reset/sun20i-d1-ccu.h>
>  
> -#define CLK_NUMBER		(CLK_FANOUT2 + 1)
> +#define CLK_NUMBER		(CLK_BUS_CAN1 + 1)
>  
>  #endif /* _CCU_SUN20I_D1_H_ */
> diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h b/include/dt-bindings/clock/sun20i-d1-ccu.h
> index e3ac53315e1a..e143b9929763 100644
> --- a/include/dt-bindings/clock/sun20i-d1-ccu.h
> +++ b/include/dt-bindings/clock/sun20i-d1-ccu.h
> @@ -152,5 +152,7 @@
>  #define CLK_FANOUT0		142
>  #define CLK_FANOUT1		143
>  #define CLK_FANOUT2		144
> +#define CLK_BUS_CAN0		145
> +#define CLK_BUS_CAN1		146
>  
>  #endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */
> diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h
> index de9ff5203239..f8001cf50bf1 100644
> --- a/include/dt-bindings/reset/sun20i-d1-ccu.h
> +++ b/include/dt-bindings/reset/sun20i-d1-ccu.h
> @@ -73,5 +73,7 @@
>  #define RST_BUS_DSP_CFG		63
>  #define RST_BUS_DSP_DBG		64
>  #define RST_BUS_RISCV_CFG	65
> +#define RST_BUS_CAN0		66
> +#define RST_BUS_CAN1		67
>  
>  #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */