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* [PATCH 1/5] dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells
@ 2022-11-26 22:47 Marek Vasut
  2022-11-26 22:47 ` [PATCH 2/5] arm64: dts: imx8m: Align SoC unique ID node unit address Marek Vasut
                   ` (4 more replies)
  0 siblings, 5 replies; 15+ messages in thread
From: Marek Vasut @ 2022-11-26 22:47 UTC (permalink / raw)
  To: linux-pm, linux-arm-kernel
  Cc: Marek Vasut, Adam Ford, Alice Guo, Amit Kucheria, Daniel Lezcano,
	Fabio Estevam, Krzysztof Kozlowski, Li Jun, Lucas Stach,
	Markus Niebel, NXP Linux Team, Peng Fan, Pengutronix Kernel Team,
	Rafael J . Wysocki, Richard Cochran, Rob Herring, Sascha Hauer,
	Shawn Guo, Zhang Rui, devicetree

The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values from OCOTP. Document optional phandle to OCOTP nvmem
provider.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Adam Ford <aford173@gmail.com>
Cc: Alice Guo <alice.guo@nxp.com>
Cc: Amit Kucheria <amitk@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Li Jun <jun.li@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: devicetree@vger.kernel.org
To: linux-pm@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
 .../devicetree/bindings/thermal/imx8mm-thermal.yaml        | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
index 89c54e08ee61b..b90726229ac9c 100644
--- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
@@ -32,6 +32,13 @@ properties:
   clocks:
     maxItems: 1
 
+  nvmem-cells:
+    maxItems: 1
+    description: Phandle to the calibration data provided by ocotp
+
+  nvmem-cell-names:
+    const: calib
+
   "#thermal-sensor-cells":
     description: |
       Number of cells required to uniquely identify the thermal
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2022-12-01  5:14 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-11-26 22:47 [PATCH 1/5] dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells Marek Vasut
2022-11-26 22:47 ` [PATCH 2/5] arm64: dts: imx8m: Align SoC unique ID node unit address Marek Vasut
2022-11-28  2:16   ` Peng Fan
2022-11-26 22:47 ` [PATCH 3/5] arm64: dts: imx8m: Document the fuse address calculation Marek Vasut
2022-11-28  2:18   ` Peng Fan
2022-11-26 22:47 ` [PATCH 4/5] arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP Marek Vasut
2022-11-28  2:29   ` Peng Fan
2022-11-28  8:34   ` Alexander Stein
2022-11-28  9:35     ` Marek Vasut
2022-11-26 22:47 ` [PATCH 5/5] thermal/drivers/imx: Add support for loading calibration data from OCOTP Marek Vasut
2022-11-27  5:07   ` kernel test robot
2022-11-28  2:58   ` Peng Fan
2022-11-30 15:14   ` kernel test robot
2022-12-01  5:13   ` kernel test robot
2022-11-27 12:33 ` [PATCH 1/5] dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells Krzysztof Kozlowski

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