From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93CE2C433FE for ; Mon, 28 Nov 2022 17:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233343AbiK1Ro6 (ORCPT ); Mon, 28 Nov 2022 12:44:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233403AbiK1Rob (ORCPT ); Mon, 28 Nov 2022 12:44:31 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA1182BB0A; Mon, 28 Nov 2022 09:40:58 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5366B612ED; Mon, 28 Nov 2022 17:40:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A94E9C433D6; Mon, 28 Nov 2022 17:40:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669657257; bh=E1BM62EVAwHumb+42ajCVFXGfNBikxA6OL+9XDVlbwk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=s+y20knrzAMk5l/ciLg4/Fe8YTaLBuF9mOoDc8JE6PXlOfiJcukZm6eCGSRTsdBtO Cv+PHi///WWuoikQrE4eY0q+sWZmgBYby1vBTN2Hn/7oWDwIZmz9XlvmKwOjh1u2nA Fs/CQ4klYlXQ+80Gq4nr/LHCgMfKErcLQW3sBKdj5m+P6IAs1nP6khARomp00hhE64 DxoUpNc2XQdgXpKVkL6ZIy7B/HG0Q9J8zBjdGMT0A/I3StirEOlaiQzTmp5zIn5L2e 1wJPohtH3he8qB29rzxO2nqbeoaTnoiBfFKN/2q0wdfLlvF5oMWhU90TmkeRPq8v2O LBzbQAQ1Onv8g== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Johan Jonker , Heiko Stuebner , Sasha Levin , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH AUTOSEL 5.15 12/24] ARM: dts: rockchip: disable arm_global_timer on rk3066 and rk3188 Date: Mon, 28 Nov 2022 12:40:12 -0500 Message-Id: <20221128174027.1441921-12-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221128174027.1441921-1-sashal@kernel.org> References: <20221128174027.1441921-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Johan Jonker [ Upstream commit da74858a475782a3f16470907814c8cc5950ad68 ] The clock source and the sched_clock provided by the arm_global_timer on Rockchip rk3066a/rk3188 are quite unstable because their rates depend on the CPU frequency. Recent changes to the arm_global_timer driver makes it impossible to use. On the other side, the arm_global_timer has a higher rating than the ROCKCHIP_TIMER, it will be selected by default by the time framework while we want to use the stable Rockchip clock source. Keep the arm_global_timer disabled in order to have the DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/f275ca8d-fd0a-26e5-b978-b7f3df815e0a@gmail.com Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- arch/arm/boot/dts/rk3188.dtsi | 1 - arch/arm/boot/dts/rk3xxx.dtsi | 7 +++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 7c8c5c28dc2e..e07b1d79c470 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -606,7 +606,6 @@ &emac { &global_timer { interrupts = ; - status = "disabled"; }; &local_timer { diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 616a828e0c6e..17e89d30de78 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -76,6 +76,13 @@ global_timer: global-timer@1013c200 { reg = <0x1013c200 0x20>; interrupts = ; clocks = <&cru CORE_PERI>; + status = "disabled"; + /* The clock source and the sched_clock provided by the arm_global_timer + * on Rockchip rk3066a/rk3188 are quite unstable because their rates + * depend on the CPU frequency. + * Keep the arm_global_timer disabled in order to have the + * DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. + */ }; local_timer: local-timer@1013c600 { -- 2.35.1