From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D6DCC47088 for ; Mon, 28 Nov 2022 17:48:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233644AbiK1RsE (ORCPT ); Mon, 28 Nov 2022 12:48:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233852AbiK1RrZ (ORCPT ); Mon, 28 Nov 2022 12:47:25 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A538BDE98; Mon, 28 Nov 2022 09:42:20 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 60D36B80E9D; Mon, 28 Nov 2022 17:42:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2C077C433D6; Mon, 28 Nov 2022 17:42:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669657338; bh=I2Akvl+ob+fZLN2ur53/RlotzPhrtZcMiScn6OptW1w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nd/xG2eD9M4TOW4dWGUTAnM0VhexlonBlzRvGbin/8u78eD2fVuw/Yz8RRUHhjHDy ZqwdqdYeZd7N5Q4B0cxpiTwgbtH53qLSLFIA3tMd+3opXkt22uLUECq105cC+F5MR8 LnxiB20hkGrk3w4SBiL6lQiJz1kcuvZvoAcJhspv2DLANSnhvm3hCY/417qSjZW2K7 m922s1W5DH5gAiygI/Fjeq+HPrA6leAH2qQZp8izHMhgiAxrMdM4KMTrAN7dK15kZX W0oT0QgHFDY70MOD90uRI/mVRtR7Ib+LjXwIawIRPO+LvYC5jp7wKqdOYzzyLBAf1/ 3ezr/aEaTkhtg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Johan Jonker , Heiko Stuebner , Sasha Levin , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH AUTOSEL 5.4 07/16] ARM: dts: rockchip: disable arm_global_timer on rk3066 and rk3188 Date: Mon, 28 Nov 2022 12:41:50 -0500 Message-Id: <20221128174201.1442499-7-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221128174201.1442499-1-sashal@kernel.org> References: <20221128174201.1442499-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Johan Jonker [ Upstream commit da74858a475782a3f16470907814c8cc5950ad68 ] The clock source and the sched_clock provided by the arm_global_timer on Rockchip rk3066a/rk3188 are quite unstable because their rates depend on the CPU frequency. Recent changes to the arm_global_timer driver makes it impossible to use. On the other side, the arm_global_timer has a higher rating than the ROCKCHIP_TIMER, it will be selected by default by the time framework while we want to use the stable Rockchip clock source. Keep the arm_global_timer disabled in order to have the DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/f275ca8d-fd0a-26e5-b978-b7f3df815e0a@gmail.com Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- arch/arm/boot/dts/rk3188.dtsi | 1 - arch/arm/boot/dts/rk3xxx.dtsi | 7 +++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 95d558dc163c..5e8ba80d7b4f 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -632,7 +632,6 @@ &emac { &global_timer { interrupts = ; - status = "disabled"; }; &local_timer { diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index bce0b05ef7bf..0580eea90fbc 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -108,6 +108,13 @@ global_timer: global-timer@1013c200 { reg = <0x1013c200 0x20>; interrupts = ; clocks = <&cru CORE_PERI>; + status = "disabled"; + /* The clock source and the sched_clock provided by the arm_global_timer + * on Rockchip rk3066a/rk3188 are quite unstable because their rates + * depend on the CPU frequency. + * Keep the arm_global_timer disabled in order to have the + * DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. + */ }; local_timer: local-timer@1013c600 { -- 2.35.1