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From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: <neil.armstrong@linaro.org>, <jbrunet@baylibre.com>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<khilman@baylibre.com>, <martin.blumenstingl@googlemail.com>
Cc: <jian.hu@amlogic.com>, <kernel@sberdevices.ru>,
	<rockosov@gmail.com>, <linux-amlogic@lists.infradead.org>,
	<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Dmitry Rokosov <ddrokosov@sberdevices.ru>
Subject: [PATCH v8 06/11] clk: meson: introduce a1-clkc common driver for all A1 clock controllers
Date: Fri, 2 Dec 2022 01:56:58 +0300	[thread overview]
Message-ID: <20221201225703.6507-7-ddrokosov@sberdevices.ru> (raw)
In-Reply-To: <20221201225703.6507-1-ddrokosov@sberdevices.ru>

Generally, A1 SoC has four clock controllers on the board: PLL,
Peripherals, CPU, and Audio. The audio clock controller is different
from others, but the rest are very similar from a functional and regmap
point of view. So a it's good idea to generalize some routines for all
of them. Exactly, meson-a1-clkc driver contains the common probe() flow.

Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
---
 drivers/clk/meson/Kconfig         |  4 ++
 drivers/clk/meson/Makefile        |  1 +
 drivers/clk/meson/meson-a1-clkc.c | 63 +++++++++++++++++++++++++++++++
 drivers/clk/meson/meson-a1-clkc.h | 25 ++++++++++++
 4 files changed, 93 insertions(+)
 create mode 100644 drivers/clk/meson/meson-a1-clkc.c
 create mode 100644 drivers/clk/meson/meson-a1-clkc.h

diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index bd44ba47200e..1c885541c3a9 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig
@@ -43,6 +43,10 @@ config COMMON_CLK_MESON_CPU_DYNDIV
 	tristate
 	select COMMON_CLK_MESON_REGMAP
 
+config COMMON_CLK_MESON_A1_CLKC
+	tristate
+	select COMMON_CLK_MESON_REGMAP
+
 config COMMON_CLK_MESON8B
 	bool "Meson8 SoC Clock controller support"
 	depends on ARM
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
index 0e6f293c05d4..15136d861a65 100644
--- a/drivers/clk/meson/Makefile
+++ b/drivers/clk/meson/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
 obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
 obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o
 obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o
+obj-$(CONFIG_COMMON_CLK_MESON_A1_CLKC) += meson-a1-clkc.o
 
 # Amlogic Clock controllers
 
diff --git a/drivers/clk/meson/meson-a1-clkc.c b/drivers/clk/meson/meson-a1-clkc.c
new file mode 100644
index 000000000000..2fe320a0e16e
--- /dev/null
+++ b/drivers/clk/meson/meson-a1-clkc.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Amlogic Meson-A1 Clock Controller Driver
+ *
+ * Copyright (c) 2022, SberDevices. All Rights Reserved.
+ * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+ */
+
+#include <linux/of_device.h>
+#include "meson-a1-clkc.h"
+
+static struct regmap_config clkc_regmap_config = {
+	.reg_bits   = 32,
+	.val_bits   = 32,
+	.reg_stride = 4,
+};
+
+int meson_a1_clkc_probe(struct platform_device *pdev)
+{
+	struct meson_a1_clkc_data *clkc;
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	void __iomem *base;
+	struct regmap *map;
+	int clkid, i, err;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res)
+		return dev_err_probe(dev, -ENXIO, "can't get IO resource\n");
+
+	base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(base))
+		return dev_err_probe(dev, PTR_ERR(base),
+				     "can't ioremap resource %pr\n", res);
+
+	map = devm_regmap_init_mmio(dev, base, &clkc_regmap_config);
+	if (IS_ERR(map))
+		return dev_err_probe(dev, PTR_ERR(map),
+				     "can't init regmap mmio region\n");
+
+	clkc = (struct meson_a1_clkc_data *)of_device_get_match_data(dev);
+	if (!clkc)
+		return dev_err_probe(dev, -ENODEV,
+				     "can't get A1 clkc driver data\n");
+
+	/* Populate regmap for the regmap backed clocks */
+	for (i = 0; i < clkc->num_regs; i++)
+		clkc->regs[i]->map = map;
+
+	for (clkid = 0; clkid < clkc->hw->num; clkid++) {
+		err = devm_clk_hw_register(dev, clkc->hw->hws[clkid]);
+		if (err)
+			return dev_err_probe(dev, err,
+					     "clock registration failed\n");
+	}
+
+	return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
+					   (void *)clkc->hw);
+}
+EXPORT_SYMBOL_GPL(meson_a1_clkc_probe);
+
+MODULE_AUTHOR("Dmitry Rokosov <ddrokosov@sberdevices.ru>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/clk/meson/meson-a1-clkc.h b/drivers/clk/meson/meson-a1-clkc.h
new file mode 100644
index 000000000000..503eca0f6cb5
--- /dev/null
+++ b/drivers/clk/meson/meson-a1-clkc.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Amlogic Meson-A1 Clock Controller driver
+ *
+ * Copyright (c) 2022, SberDevices. All Rights Reserved.
+ * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+ */
+
+#ifndef __MESON_A1_CLKC_H__
+#define __MESON_A1_CLKC_H__
+
+#include <linux/clk-provider.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#include "clk-regmap.h"
+
+struct meson_a1_clkc_data {
+	const struct clk_hw_onecell_data *hw;
+	struct clk_regmap *const *regs;
+	size_t num_regs;
+};
+
+int meson_a1_clkc_probe(struct platform_device *pdev);
+#endif
-- 
2.36.0


  parent reply	other threads:[~2022-12-01 22:57 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 22:56 [PATCH v8 00/11] add Amlogic A1 clock controller drivers Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 01/11] dt-bindings: clock: meson: add A1 PLL clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:51     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 11:04         ` Jerome Brunet
2022-12-02 11:16           ` Krzysztof Kozlowski
2022-12-02 11:28             ` Dmitry Rokosov
2022-12-02 13:36               ` neil.armstrong
2022-12-02 10:42   ` Krzysztof Kozlowski
2022-12-02 11:18     ` Dmitry Rokosov
2022-12-02 11:11   ` Jerome Brunet
2022-12-02 12:26     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 02/11] clk: meson: a1: add support for Amlogic A1 PLL clock driver Dmitry Rokosov
2022-12-02 11:16   ` Jerome Brunet
2022-12-02 11:31     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 03/11] dt-bindings: clock: meson: add A1 peripheral clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:49     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 10:58         ` Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-01 22:56 ` [PATCH v8 04/11] clk: meson: a1: add support for Amlogic A1 Peripheral clock driver Dmitry Rokosov
2022-12-02 11:19   ` Jerome Brunet
2022-12-02 12:33     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 05/11] clk: meson: pll: export meson_clk_pll_wait_lock symbol Dmitry Rokosov
2022-12-01 22:56 ` Dmitry Rokosov [this message]
2022-12-02 11:36   ` [PATCH v8 06/11] clk: meson: introduce a1-clkc common driver for all A1 clock controllers Jerome Brunet
2022-12-02 11:58     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 07/11] clk: meson: a1: redesign Amlogic A1 PLL clock controller Dmitry Rokosov
2022-12-02 11:42   ` Jerome Brunet
2022-12-02 12:47     ` Dmitry Rokosov
2022-12-02 12:49       ` Jerome Brunet
2022-12-02 18:20         ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 08/11] dt-bindings: clock: meson: fixup A1 PLL clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 09/11] clk: meson: redesign A1 Peripherals CLK controller Dmitry Rokosov
2022-12-02 12:01   ` Jerome Brunet
2022-12-02 12:10     ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 10/11] dt-bindings: clock: meson: fixup A1 peripherals clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 11/11] arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-02 12:03   ` Jerome Brunet
2022-12-02 13:37     ` neil.armstrong

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