[PATCH 0/5] dmaengine: Add support for AM62A SoC DMAs

[PATCH 0/5] dmaengine: Add support for AM62A SoC DMAs

[Vignesh Raghavendra]

This series introduces support for various DMAs on TI's AM62A SoC under
K3 family of devices.

Apart from usual BCDMA and PKTDMA thats present on K3 family, AM62A has
a dedicated BCDMA for camera (CSI) with only RX DMA Channels.

Patch 1 adds bindings for this new DMA instance
Patch 2 fixes a bug that gets exposed due to RX only DMA
Patch 3 and 4 add base support for AM62A DMA
Patch 5 does BCDMA CSI RX specific enhancements.

Jai Luthra (1):
  dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data

Vignesh Raghavendra (4):
  dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX
  dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN
  dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC
  dmaengine: ti: k3-udma: Add support for BCDMA CSI RX

 .../devicetree/bindings/dma/ti/k3-bcdma.yaml  |  87 +++++---
 drivers/dma/ti/Makefile                       |   3 +-
 drivers/dma/ti/k3-psil-am62a.c                | 196 ++++++++++++++++++
 drivers/dma/ti/k3-psil-priv.h                 |   1 +
 drivers/dma/ti/k3-psil.c                      |   1 +
 drivers/dma/ti/k3-udma.c                      |  39 +++-
 6 files changed, 297 insertions(+), 30 deletions(-)
 create mode 100644 drivers/dma/ti/k3-psil-am62a.c

-- 
2.38.1

[PATCH 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX

[Vignesh Raghavendra]

AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface
(CSI) IP. Add new compatible for the same. Unlike system
BCDMA, this instance only has RX DMA channels and lack TX or block copy
channel. Thus make those properties optional. Additionally CSI RX has
independent power domain, add the binding for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 .../devicetree/bindings/dma/ti/k3-bcdma.yaml  | 87 ++++++++++++++-----
 1 file changed, 63 insertions(+), 24 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
index 08627d91e607..d7b5adbb9b2e 100644
--- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
+++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
@@ -32,9 +32,66 @@ allOf:
   - $ref: /schemas/dma/dma-controller.yaml#
   - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am62a-dmss-bcdma-csirx
+    then:
+      properties:
+        ti,sci-rm-range-bchan: false
+        ti,sci-rm-range-tchan: false
+
+        reg:
+          maxItems: 3
+
+        reg-names:
+          items:
+            - const: gcfg
+            - const: rchanrt
+            - const: ringrt
+
+      required:
+        - compatible
+        - "#dma-cells"
+        - reg
+        - reg-names
+        - msi-parent
+        - ti,sci
+        - ti,sci-dev-id
+        - ti,sci-rm-range-rchan
+        - power-domains
+
+    else:
+      properties:
+        reg:
+          maxItems: 5
+
+        reg-names:
+          items:
+            - const: gcfg
+            - const: bchanrt
+            - const: rchanrt
+            - const: tchanrt
+            - const: ringrt
+
+      required:
+        - compatible
+        - "#dma-cells"
+        - reg
+        - reg-names
+        - msi-parent
+        - ti,sci
+        - ti,sci-dev-id
+        - ti,sci-rm-range-bchan
+        - ti,sci-rm-range-tchan
+        - ti,sci-rm-range-rchan
+
 properties:
   compatible:
-    const: ti,am64-dmss-bcdma
+    enum:
+      - ti,am64-dmss-bcdma
+      - ti,am62a-dmss-bcdma-csirx
 
   "#dma-cells":
     const: 3
@@ -65,19 +122,13 @@ properties:
 
       cell 3: ASEL value for the channel
 
-  reg:
-    maxItems: 5
-
-  reg-names:
-    items:
-      - const: gcfg
-      - const: bchanrt
-      - const: rchanrt
-      - const: tchanrt
-      - const: ringrt
-
   msi-parent: true
 
+  power-domains:
+    description:
+      Power domain if available
+    maxItems: 1
+
   ti,asel:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: ASEL value for non slave channels
@@ -115,18 +166,6 @@ properties:
     items:
       maximum: 0x3f
 
-required:
-  - compatible
-  - "#dma-cells"
-  - reg
-  - reg-names
-  - msi-parent
-  - ti,sci
-  - ti,sci-dev-id
-  - ti,sci-rm-range-bchan
-  - ti,sci-rm-range-tchan
-  - ti,sci-rm-range-rchan
-
 unevaluatedProperties: false
 
 examples:
-- 
2.38.1

Re: [PATCH 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX

[Krzysztof Kozlowski]

On 06/12/2022 05:35, Vignesh Raghavendra wrote:
> AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface
> (CSI) IP. Add new compatible for the same. Unlike system
> BCDMA, this instance only has RX DMA channels and lack TX or block copy
> channel. Thus make those properties optional. Additionally CSI RX has
> independent power domain, add the binding for the same.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  .../devicetree/bindings/dma/ti/k3-bcdma.yaml  | 87 ++++++++++++++-----
>  1 file changed, 63 insertions(+), 24 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
> index 08627d91e607..d7b5adbb9b2e 100644
> --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
> @@ -32,9 +32,66 @@ allOf:
>    - $ref: /schemas/dma/dma-controller.yaml#
>    - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
>  

When adding if:then:, please move entire allOf after "required:" part.

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: ti,am62a-dmss-bcdma-csirx
> +    then:
> +      properties:
> +        ti,sci-rm-range-bchan: false
> +        ti,sci-rm-range-tchan: false
> +
> +        reg:
> +          maxItems: 3
> +
> +        reg-names:
> +          items:
> +            - const: gcfg
> +            - const: rchanrt
> +            - const: ringrt

With my changes further this can be only "maxItems: 3"

> +
> +      required:
> +        - compatible
> +        - "#dma-cells"
> +        - reg
> +        - reg-names
> +        - msi-parent
> +        - ti,sci
> +        - ti,sci-dev-id
> +        - ti,sci-rm-range-rchan
> +        - power-domains
> +
> +    else:
> +      properties:
> +        reg:
> +          maxItems: 5
> +
> +        reg-names:
> +          items:
> +            - const: gcfg
> +            - const: bchanrt
> +            - const: rchanrt
> +            - const: tchanrt
> +            - const: ringrt

With my changes further this can be only "minItems: 5"

> +
> +      required:
> +        - compatible
> +        - "#dma-cells"
> +        - reg
> +        - reg-names
> +        - msi-parent
> +        - ti,sci
> +        - ti,sci-dev-id
> +        - ti,sci-rm-range-bchan
> +        - ti,sci-rm-range-tchan
> +        - ti,sci-rm-range-rchan
> +
>  properties:
>    compatible:
> -    const: ti,am64-dmss-bcdma
> +    enum:
> +      - ti,am64-dmss-bcdma
> +      - ti,am62a-dmss-bcdma-csirx

Keep some order, e.g. alphabetical. This reduces later conflicts on
simultaneous edits.

>  
>    "#dma-cells":
>      const: 3
> @@ -65,19 +122,13 @@ properties:
>  
>        cell 3: ASEL value for the channel
>  
> -  reg:
> -    maxItems: 5

Keep it here with widest constrains - minItems: 3, maxItems: 5

> -
> -  reg-names:
> -    items:
> -      - const: gcfg
> -      - const: bchanrt
> -      - const: rchanrt
> -      - const: tchanrt
> -      - const: ringrt

Keep the list here with minItems: 3

> -
>    msi-parent: true
>  
> +  power-domains:
> +    description:
> +      Power domain if available
> +    maxItems: 1
> +
>    ti,asel:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: ASEL value for non slave channels
> @@ -115,18 +166,6 @@ properties:
>      items:
>        maximum: 0x3f
>  
> -required:
> -  - compatible
> -  - "#dma-cells"
> -  - reg
> -  - reg-names
> -  - msi-parent
> -  - ti,sci
> -  - ti,sci-dev-id
> -  - ti,sci-rm-range-bchan
> -  - ti,sci-rm-range-tchan
> -  - ti,sci-rm-range-rchan

Keep required here. Customize it if needed in if:then:else.

> -
>  unevaluatedProperties: false
>  
>  examples:

Best regards,
Krzysztof

Re: [PATCH 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX

[Vignesh Raghavendra]

Hi Krzysztof,

On 06/12/22 14:02, Krzysztof Kozlowski wrote:
> On 06/12/2022 05:35, Vignesh Raghavendra wrote:
>> AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface
>> (CSI) IP. Add new compatible for the same. Unlike system
>> BCDMA, this instance only has RX DMA channels and lack TX or block copy
>> channel. Thus make those properties optional. Additionally CSI RX has
>> independent power domain, add the binding for the same.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>  .../devicetree/bindings/dma/ti/k3-bcdma.yaml  | 87 ++++++++++++++-----
>>  1 file changed, 63 insertions(+), 24 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>> index 08627d91e607..d7b5adbb9b2e 100644
>> --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>> +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>> @@ -32,9 +32,66 @@ allOf:
>>    - $ref: /schemas/dma/dma-controller.yaml#
>>    - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
>>  
> 
> When adding if:then:, please move entire allOf after "required:" part.

Sure, will do

> 
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: ti,am62a-dmss-bcdma-csirx
>> +    then:
>> +      properties:
>> +        ti,sci-rm-range-bchan: false
>> +        ti,sci-rm-range-tchan: false
>> +
>> +        reg:
>> +          maxItems: 3
>> +
>> +        reg-names:
>> +          items:
>> +            - const: gcfg
>> +            - const: rchanrt
>> +            - const: ringrt
> 
> With my changes further this can be only "maxItems: 3"

Yes, but wont that mean any of the 3 reg-names out of the 5? Would it
not be better to further restrict specifically to above 3 reg-names (as
thats how the IP is)

> 
>> +
>> +      required:
>> +        - compatible
>> +        - "#dma-cells"
>> +        - reg
>> +        - reg-names
>> +        - msi-parent
>> +        - ti,sci
>> +        - ti,sci-dev-id
>> +        - ti,sci-rm-range-rchan
>> +        - power-domains
>> +
>> +    else:
>> +      properties:
>> +        reg:
>> +          maxItems: 5
>> +
>> +        reg-names:
>> +          items:
>> +            - const: gcfg
>> +            - const: bchanrt
>> +            - const: rchanrt
>> +            - const: tchanrt
>> +            - const: ringrt
> 
> With my changes further this can be only "minItems: 5"

Ok.

> 
>> +
>> +      required:
>> +        - compatible
>> +        - "#dma-cells"
>> +        - reg
>> +        - reg-names
>> +        - msi-parent
>> +        - ti,sci
>> +        - ti,sci-dev-id
>> +        - ti,sci-rm-range-bchan
>> +        - ti,sci-rm-range-tchan
>> +        - ti,sci-rm-range-rchan
>> +
>>  properties:
>>    compatible:
>> -    const: ti,am64-dmss-bcdma
>> +    enum:
>> +      - ti,am64-dmss-bcdma
>> +      - ti,am62a-dmss-bcdma-csirx
> 
> Keep some order, e.g. alphabetical. This reduces later conflicts on
> simultaneous edits.

Will fix!

> 
>>  
>>    "#dma-cells":
>>      const: 3
>> @@ -65,19 +122,13 @@ properties:
>>  
>>        cell 3: ASEL value for the channel
>>  
>> -  reg:
>> -    maxItems: 5
> 
> Keep it here with widest constrains - minItems: 3, maxItems: 5
> 
>> -
>> -  reg-names:
>> -    items:
>> -      - const: gcfg
>> -      - const: bchanrt
>> -      - const: rchanrt
>> -      - const: tchanrt
>> -      - const: ringrt
> 
> Keep the list here with minItems: 3
> 
>> -
>>    msi-parent: true
>>  
>> +  power-domains:
>> +    description:
>> +      Power domain if available
>> +    maxItems: 1
>> +
>>    ti,asel:
>>      $ref: /schemas/types.yaml#/definitions/uint32
>>      description: ASEL value for non slave channels
>> @@ -115,18 +166,6 @@ properties:
>>      items:
>>        maximum: 0x3f
>>  
>> -required:
>> -  - compatible
>> -  - "#dma-cells"
>> -  - reg
>> -  - reg-names
>> -  - msi-parent
>> -  - ti,sci
>> -  - ti,sci-dev-id
>> -  - ti,sci-rm-range-bchan
>> -  - ti,sci-rm-range-tchan
>> -  - ti,sci-rm-range-rchan
> 
> Keep required here. Customize it if needed in if:then:else.

Got it, will fix accordingly...

> 
>> -
>>  unevaluatedProperties: false
>>  
>>  examples:
> 
> Best regards,
> Krzysztof
> 

Thanks for the review!


-- 
Regards
Vignesh

Re: [PATCH 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX

[Krzysztof Kozlowski]

On 07/12/2022 07:09, Vignesh Raghavendra wrote:
> Hi Krzysztof,
> 
> On 06/12/22 14:02, Krzysztof Kozlowski wrote:
>> On 06/12/2022 05:35, Vignesh Raghavendra wrote:
>>> AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface
>>> (CSI) IP. Add new compatible for the same. Unlike system
>>> BCDMA, this instance only has RX DMA channels and lack TX or block copy
>>> channel. Thus make those properties optional. Additionally CSI RX has
>>> independent power domain, add the binding for the same.
>>>
>>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>>> ---
>>>  .../devicetree/bindings/dma/ti/k3-bcdma.yaml  | 87 ++++++++++++++-----
>>>  1 file changed, 63 insertions(+), 24 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>>> index 08627d91e607..d7b5adbb9b2e 100644
>>> --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>>> +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
>>> @@ -32,9 +32,66 @@ allOf:
>>>    - $ref: /schemas/dma/dma-controller.yaml#
>>>    - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
>>>  
>>
>> When adding if:then:, please move entire allOf after "required:" part.
> 
> Sure, will do
> 
>>
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            const: ti,am62a-dmss-bcdma-csirx
>>> +    then:
>>> +      properties:
>>> +        ti,sci-rm-range-bchan: false
>>> +        ti,sci-rm-range-tchan: false
>>> +
>>> +        reg:
>>> +          maxItems: 3
>>> +
>>> +        reg-names:
>>> +          items:
>>> +            - const: gcfg
>>> +            - const: rchanrt
>>> +            - const: ringrt
>>
>> With my changes further this can be only "maxItems: 3"
> 
> Yes, but wont that mean any of the 3 reg-names out of the 5? Would it
> not be better to further restrict specifically to above 3 reg-names (as
> thats how the IP is)

I thought that first three entries are the same, but they are not, so
indeed keep it like you have it now.

> 
>>
>>> +
>>> +      required:
>>> +        - compatible
>>> +        - "#dma-cells"
>>> +        - reg
>>> +        - reg-names
>>> +        - msi-parent
>>> +        - ti,sci
>>> +        - ti,sci-dev-id
>>> +        - ti,sci-rm-range-rchan
>>> +        - power-domains
>>> +
>>> +    else:
>>> +      properties:
>>> +        reg:
>>> +          maxItems: 5
>>> +
>>> +        reg-names:
>>> +          items:
>>> +            - const: gcfg
>>> +            - const: bchanrt
>>> +            - const: rchanrt
>>> +            - const: tchanrt
>>> +            - const: ringrt
>>
>> With my changes further this can be only "minItems: 5"
> 
> Ok.

I was wrong, keep it.

> 
>>
>>> +
>>> +      required:
>>> +        - compatible
>>> +        - "#dma-cells"
>>> +        - reg
>>> +        - reg-names
>>> +        - msi-parent
>>> +        - ti,sci
>>> +        - ti,sci-dev-id
>>> +        - ti,sci-rm-range-bchan
>>> +        - ti,sci-rm-range-tchan
>>> +        - ti,sci-rm-range-rchan
>>> +
>>>  properties:
>>>    compatible:
>>> -    const: ti,am64-dmss-bcdma
>>> +    enum:
>>> +      - ti,am64-dmss-bcdma
>>> +      - ti,am62a-dmss-bcdma-csirx
>>
>> Keep some order, e.g. alphabetical. This reduces later conflicts on
>> simultaneous edits.
> 
> Will fix!
> 
>>
>>>  
>>>    "#dma-cells":
>>>      const: 3
>>> @@ -65,19 +122,13 @@ properties:
>>>  
>>>        cell 3: ASEL value for the channel
>>>  
>>> -  reg:
>>> -    maxItems: 5
>>
>> Keep it here with widest constrains - minItems: 3, maxItems: 5
>>
>>> -
>>> -  reg-names:
>>> -    items:
>>> -      - const: gcfg
>>> -      - const: bchanrt
>>> -      - const: rchanrt
>>> -      - const: tchanrt
>>> -      - const: ringrt
>>
>> Keep the list here with minItems: 3

So here minItems:3, maxItems:5


Best regards,
Krzysztof

[PATCH 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN

[Vignesh Raghavendra]

Reusing loop iterator fails if BCHAN is not present as iterator is
uninitialized

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/dma/ti/k3-udma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index ce8b80bb34d7..791cf6354946 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -4758,6 +4758,7 @@ static int bcdma_setup_resources(struct udma_dev *ud)
 		}
 	}
 
+	i = 0;
 	irq_res.desc = kcalloc(irq_res.sets, sizeof(*irq_res.desc), GFP_KERNEL);
 	if (!irq_res.desc)
 		return -ENOMEM;
-- 
2.38.1

Re: [PATCH 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN

[Péter Ujfalusi]

On 12/6/22 06:35, Vignesh Raghavendra wrote:
> Reusing loop iterator fails if BCHAN is not present as iterator is
> uninitialized
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  drivers/dma/ti/k3-udma.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
> index ce8b80bb34d7..791cf6354946 100644
> --- a/drivers/dma/ti/k3-udma.c
> +++ b/drivers/dma/ti/k3-udma.c
> @@ -4758,6 +4758,7 @@ static int bcdma_setup_resources(struct udma_dev *ud)
>  		}
>  	}
>  
> +	i = 0;

I think this would be more appropriate:
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index ce8b80bb34d7..7f8737da3613 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -4774,6 +4774,8 @@ static int bcdma_setup_resources(struct udma_dev *ud)
 				irq_res.desc[i].num = rm_res->desc[i].num;
 			}
 		}
+	} else {
+		i = 0;
 	}
 	if (ud->tchan_cnt) {
 		rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN];


>  	irq_res.desc = kcalloc(irq_res.sets, sizeof(*irq_res.desc), GFP_KERNEL);
>  	if (!irq_res.desc)
>  		return -ENOMEM;


-- 
Péter

Re: [PATCH 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN

[Vignesh Raghavendra]

Hi Peter,

On 10/12/22 13:54, Péter Ujfalusi wrote:
> 
> 
> On 12/6/22 06:35, Vignesh Raghavendra wrote:
>> Reusing loop iterator fails if BCHAN is not present as iterator is
>> uninitialized
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>  drivers/dma/ti/k3-udma.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
>> index ce8b80bb34d7..791cf6354946 100644
>> --- a/drivers/dma/ti/k3-udma.c
>> +++ b/drivers/dma/ti/k3-udma.c
>> @@ -4758,6 +4758,7 @@ static int bcdma_setup_resources(struct udma_dev *ud)
>>  		}
>>  	}
>>  
>> +	i = 0;
> 
> I think this would be more appropriate:
> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
> index ce8b80bb34d7..7f8737da3613 100644
> --- a/drivers/dma/ti/k3-udma.c
> +++ b/drivers/dma/ti/k3-udma.c
> @@ -4774,6 +4774,8 @@ static int bcdma_setup_resources(struct udma_dev *ud)
>  				irq_res.desc[i].num = rm_res->desc[i].num;
>  			}
>  		}
> +	} else {
> +		i = 0;
>  	}
>  	if (ud->tchan_cnt) {
>  		rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN];
> 
> 

Agreed, will update in v2.

>>  	irq_res.desc = kcalloc(irq_res.sets, sizeof(*irq_res.desc), GFP_KERNEL);
>>  	if (!irq_res.desc)
>>  		return -ENOMEM;
> 
> 

-- 
Regards
Vignesh

[PATCH 3/5] dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data

[Vignesh Raghavendra]

From: Jai Luthra <j-luthra@ti.com>

Add PSIL and PDMA data for AM62Ax SoC.

Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/dma/ti/Makefile        |   3 +-
 drivers/dma/ti/k3-psil-am62a.c | 196 +++++++++++++++++++++++++++++++++
 drivers/dma/ti/k3-psil-priv.h  |   1 +
 drivers/dma/ti/k3-psil.c       |   1 +
 4 files changed, 200 insertions(+), 1 deletion(-)
 create mode 100644 drivers/dma/ti/k3-psil-am62a.c

diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index b53d05b11ca5..bd1e07fda559 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -10,6 +10,7 @@ k3-psil-lib-objs := k3-psil.o \
 		    k3-psil-j7200.o \
 		    k3-psil-am64.o \
 		    k3-psil-j721s2.o \
-		    k3-psil-am62.o
+		    k3-psil-am62.o \
+		    k3-psil-am62a.o
 obj-$(CONFIG_TI_K3_PSIL) += k3-psil-lib.o
 obj-$(CONFIG_TI_DMA_CROSSBAR) += dma-crossbar.o
diff --git a/drivers/dma/ti/k3-psil-am62a.c b/drivers/dma/ti/k3-psil-am62a.c
new file mode 100644
index 000000000000..ca9d71f91422
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62a.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include <linux/kernel.h>
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x)					\
+	{							\
+		.thread_id = x,					\
+		.ep_config = {					\
+			.ep_type = PSIL_EP_PDMA_XY,		\
+			.mapped_channel_id = -1,		\
+			.default_flow_id = -1,			\
+		},						\
+	}
+
+#define PSIL_PDMA_XY_PKT(x)					\
+	{							\
+		.thread_id = x,					\
+		.ep_config = {					\
+			.ep_type = PSIL_EP_PDMA_XY,		\
+			.mapped_channel_id = -1,		\
+			.default_flow_id = -1,			\
+			.pkt_mode = 1,				\
+		},						\
+	}
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt)		\
+	{							\
+		.thread_id = x,					\
+		.ep_config = {					\
+			.ep_type = PSIL_EP_NATIVE,		\
+			.pkt_mode = 1,				\
+			.needs_epib = 1,			\
+			.psd_size = 16,				\
+			.mapped_channel_id = ch,		\
+			.flow_start = flow_base,		\
+			.flow_num = flow_cnt,			\
+			.default_flow_id = flow_base,		\
+		},						\
+	}
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)	\
+	{							\
+		.thread_id = x,					\
+		.ep_config = {					\
+			.ep_type = PSIL_EP_NATIVE,		\
+			.pkt_mode = 1,				\
+			.needs_epib = 1,			\
+			.psd_size = 64,				\
+			.mapped_channel_id = ch,		\
+			.flow_start = flow_base,		\
+			.flow_num = flow_cnt,			\
+			.default_flow_id = default_flow,	\
+			.notdpkt = tx,				\
+		},						\
+	}
+
+#define PSIL_PDMA_MCASP(x)				\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_PDMA_XY,	\
+			.pdma_acc32 = 1,		\
+			.pdma_burst = 1,		\
+		},					\
+	}
+
+#define PSIL_CSI2RX(x)					\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+		},					\
+	}
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep am62a_src_ep_map[] = {
+	/* SAUL */
+	PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
+	PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
+	PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
+	PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
+	/* PDMA_MAIN0 - SPI0-3 */
+	PSIL_PDMA_XY_PKT(0x4302),
+	PSIL_PDMA_XY_PKT(0x4303),
+	PSIL_PDMA_XY_PKT(0x4304),
+	PSIL_PDMA_XY_PKT(0x4305),
+	PSIL_PDMA_XY_PKT(0x4306),
+	PSIL_PDMA_XY_PKT(0x4307),
+	PSIL_PDMA_XY_PKT(0x4308),
+	PSIL_PDMA_XY_PKT(0x4309),
+	PSIL_PDMA_XY_PKT(0x430a),
+	PSIL_PDMA_XY_PKT(0x430b),
+	PSIL_PDMA_XY_PKT(0x430c),
+	PSIL_PDMA_XY_PKT(0x430d),
+	/* PDMA_MAIN1 - UART0-6 */
+	PSIL_PDMA_XY_PKT(0x4400),
+	PSIL_PDMA_XY_PKT(0x4401),
+	PSIL_PDMA_XY_PKT(0x4402),
+	PSIL_PDMA_XY_PKT(0x4403),
+	PSIL_PDMA_XY_PKT(0x4404),
+	PSIL_PDMA_XY_PKT(0x4405),
+	PSIL_PDMA_XY_PKT(0x4406),
+	/* PDMA_MAIN2 - MCASP0-2 */
+	PSIL_PDMA_MCASP(0x4500),
+	PSIL_PDMA_MCASP(0x4501),
+	PSIL_PDMA_MCASP(0x4502),
+	/* CPSW3G */
+	PSIL_ETHERNET(0x4600, 19, 19, 16),
+	/* CSI2RX */
+	PSIL_CSI2RX(0x5000),
+	PSIL_CSI2RX(0x5001),
+	PSIL_CSI2RX(0x5002),
+	PSIL_CSI2RX(0x5003),
+	PSIL_CSI2RX(0x5004),
+	PSIL_CSI2RX(0x5005),
+	PSIL_CSI2RX(0x5006),
+	PSIL_CSI2RX(0x5007),
+	PSIL_CSI2RX(0x5008),
+	PSIL_CSI2RX(0x5009),
+	PSIL_CSI2RX(0x500a),
+	PSIL_CSI2RX(0x500b),
+	PSIL_CSI2RX(0x500c),
+	PSIL_CSI2RX(0x500d),
+	PSIL_CSI2RX(0x500e),
+	PSIL_CSI2RX(0x500f),
+	PSIL_CSI2RX(0x5010),
+	PSIL_CSI2RX(0x5011),
+	PSIL_CSI2RX(0x5012),
+	PSIL_CSI2RX(0x5013),
+	PSIL_CSI2RX(0x5014),
+	PSIL_CSI2RX(0x5015),
+	PSIL_CSI2RX(0x5016),
+	PSIL_CSI2RX(0x5017),
+	PSIL_CSI2RX(0x5018),
+	PSIL_CSI2RX(0x5019),
+	PSIL_CSI2RX(0x501a),
+	PSIL_CSI2RX(0x501b),
+	PSIL_CSI2RX(0x501c),
+	PSIL_CSI2RX(0x501d),
+	PSIL_CSI2RX(0x501e),
+	PSIL_CSI2RX(0x501f),
+};
+
+/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
+static struct psil_ep am62a_dst_ep_map[] = {
+	/* SAUL */
+	PSIL_SAUL(0xf500, 27, 83, 8, 83, 1),
+	PSIL_SAUL(0xf501, 28, 91, 8, 91, 1),
+	/* PDMA_MAIN0 - SPI0-3 */
+	PSIL_PDMA_XY_PKT(0xc302),
+	PSIL_PDMA_XY_PKT(0xc303),
+	PSIL_PDMA_XY_PKT(0xc304),
+	PSIL_PDMA_XY_PKT(0xc305),
+	PSIL_PDMA_XY_PKT(0xc306),
+	PSIL_PDMA_XY_PKT(0xc307),
+	PSIL_PDMA_XY_PKT(0xc308),
+	PSIL_PDMA_XY_PKT(0xc309),
+	PSIL_PDMA_XY_PKT(0xc30a),
+	PSIL_PDMA_XY_PKT(0xc30b),
+	PSIL_PDMA_XY_PKT(0xc30c),
+	PSIL_PDMA_XY_PKT(0xc30d),
+	/* PDMA_MAIN1 - UART0-6 */
+	PSIL_PDMA_XY_PKT(0xc400),
+	PSIL_PDMA_XY_PKT(0xc401),
+	PSIL_PDMA_XY_PKT(0xc402),
+	PSIL_PDMA_XY_PKT(0xc403),
+	PSIL_PDMA_XY_PKT(0xc404),
+	PSIL_PDMA_XY_PKT(0xc405),
+	PSIL_PDMA_XY_PKT(0xc406),
+	/* PDMA_MAIN2 - MCASP0-2 */
+	PSIL_PDMA_MCASP(0xc500),
+	PSIL_PDMA_MCASP(0xc501),
+	PSIL_PDMA_MCASP(0xc502),
+	/* CPSW3G */
+	PSIL_ETHERNET(0xc600, 19, 19, 8),
+	PSIL_ETHERNET(0xc601, 20, 27, 8),
+	PSIL_ETHERNET(0xc602, 21, 35, 8),
+	PSIL_ETHERNET(0xc603, 22, 43, 8),
+	PSIL_ETHERNET(0xc604, 23, 51, 8),
+	PSIL_ETHERNET(0xc605, 24, 59, 8),
+	PSIL_ETHERNET(0xc606, 25, 67, 8),
+	PSIL_ETHERNET(0xc607, 26, 75, 8),
+};
+
+struct psil_ep_map am62a_ep_map = {
+	.name = "am62a",
+	.src = am62a_src_ep_map,
+	.src_count = ARRAY_SIZE(am62a_src_ep_map),
+	.dst = am62a_dst_ep_map,
+	.dst_count = ARRAY_SIZE(am62a_dst_ep_map),
+};
diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h
index 74fa9ec02968..abd650bb7600 100644
--- a/drivers/dma/ti/k3-psil-priv.h
+++ b/drivers/dma/ti/k3-psil-priv.h
@@ -43,5 +43,6 @@ extern struct psil_ep_map j7200_ep_map;
 extern struct psil_ep_map am64_ep_map;
 extern struct psil_ep_map j721s2_ep_map;
 extern struct psil_ep_map am62_ep_map;
+extern struct psil_ep_map am62a_ep_map;
 
 #endif /* K3_PSIL_PRIV_H_ */
diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c
index 8b6533a1eeeb..2da6988a0e7b 100644
--- a/drivers/dma/ti/k3-psil.c
+++ b/drivers/dma/ti/k3-psil.c
@@ -24,6 +24,7 @@ static const struct soc_device_attribute k3_soc_devices[] = {
 	{ .family = "AM64X", .data = &am64_ep_map },
 	{ .family = "J721S2", .data = &j721s2_ep_map },
 	{ .family = "AM62X", .data = &am62_ep_map },
+	{ .family = "AM62AX", .data = &am62a_ep_map },
 	{ /* sentinel */ }
 };
 
-- 
2.38.1

[PATCH 4/5] dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC

[Vignesh Raghavendra]

AM62A SoC has a BCDMA and PKTDMA as systems DMAs for service various
peripherals similar to AM64 SoC. Add support for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/dma/ti/k3-udma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 791cf6354946..19fce52a9b53 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -4386,6 +4386,7 @@ static const struct soc_device_attribute k3_soc_devices[] = {
 	{ .family = "AM64X", .data = &am64_soc_data },
 	{ .family = "J721S2", .data = &j721e_soc_data},
 	{ .family = "AM62X", .data = &am64_soc_data },
+	{ .family = "AM62AX", .data = &am64_soc_data },
 	{ /* sentinel */ }
 };
 
-- 
2.38.1

[PATCH 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX

[Vignesh Raghavendra]

BCDMA CSI RX present on AM62Ax SoC is a dedicated DMA for servicing
Camera Serial Interface (CSI) IP. Add support for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/dma/ti/k3-udma.c | 37 ++++++++++++++++++++++++++++++++-----
 1 file changed, 32 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 19fce52a9b53..a8b497ed3f30 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -135,6 +135,7 @@ struct udma_match_data {
 	u32 flags;
 	u32 statictr_z_mask;
 	u8 burst_size[3];
+	struct udma_soc_data *soc_data;
 };
 
 struct udma_soc_data {
@@ -4295,6 +4296,25 @@ static struct udma_match_data j721e_mcu_data = {
 	},
 };
 
+static struct udma_soc_data am62a_dmss_csi_soc_data = {
+	.oes = {
+		.bcdma_rchan_data = 0xe00,
+		.bcdma_rchan_ring = 0x1000,
+	},
+};
+
+static struct udma_match_data am62a_bcdma_csirx_data = {
+	.type = DMA_TYPE_BCDMA,
+	.psil_base = 0x3100,
+	.enable_memcpy_support = false,
+	.burst_size = {
+		TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */
+		0, /* No H Channels */
+		0, /* No UH Channels */
+	},
+	.soc_data = &am62a_dmss_csi_soc_data,
+};
+
 static struct udma_match_data am64_bcdma_data = {
 	.type = DMA_TYPE_BCDMA,
 	.psil_base = 0x2000, /* for tchan and rchan, not applicable to bchan */
@@ -4344,6 +4364,10 @@ static const struct of_device_id udma_of_match[] = {
 		.compatible = "ti,am64-dmss-pktdma",
 		.data = &am64_pktdma_data,
 	},
+	{
+		.compatible = "ti,am62a-dmss-bcdma-csirx",
+		.data = &am62a_bcdma_csirx_data,
+	},
 	{ /* Sentinel */ },
 };
 
@@ -5272,12 +5296,15 @@ static int udma_probe(struct platform_device *pdev)
 	}
 	ud->match_data = match->data;
 
-	soc = soc_device_match(k3_soc_devices);
-	if (!soc) {
-		dev_err(dev, "No compatible SoC found\n");
-		return -ENODEV;
+	ud->soc_data = ud->match_data->soc_data;
+	if (!ud->soc_data) {
+		soc = soc_device_match(k3_soc_devices);
+		if (!soc) {
+			dev_err(dev, "No compatible SoC found\n");
+			return -ENODEV;
+		}
+		ud->soc_data = soc->data;
 	}
-	ud->soc_data = soc->data;
 
 	ret = udma_get_mmrs(pdev, ud);
 	if (ret)
-- 
2.38.1

Re: [PATCH 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX

[Péter Ujfalusi]

On 12/6/22 06:35, Vignesh Raghavendra wrote:
> BCDMA CSI RX present on AM62Ax SoC is a dedicated DMA for servicing
> Camera Serial Interface (CSI) IP. Add support for the same.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  drivers/dma/ti/k3-udma.c | 37 ++++++++++++++++++++++++++++++++-----
>  1 file changed, 32 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
> index 19fce52a9b53..a8b497ed3f30 100644
> --- a/drivers/dma/ti/k3-udma.c
> +++ b/drivers/dma/ti/k3-udma.c
> @@ -135,6 +135,7 @@ struct udma_match_data {
>  	u32 flags;
>  	u32 statictr_z_mask;
>  	u8 burst_size[3];
> +	struct udma_soc_data *soc_data;
>  };
>  
>  struct udma_soc_data {
> @@ -4295,6 +4296,25 @@ static struct udma_match_data j721e_mcu_data = {
>  	},
>  };
>  
> +static struct udma_soc_data am62a_dmss_csi_soc_data = {
> +	.oes = {
> +		.bcdma_rchan_data = 0xe00,
> +		.bcdma_rchan_ring = 0x1000,
> +	},
> +};
> +
> +static struct udma_match_data am62a_bcdma_csirx_data = {
> +	.type = DMA_TYPE_BCDMA,
> +	.psil_base = 0x3100,
> +	.enable_memcpy_support = false,
> +	.burst_size = {
> +		TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */
> +		0, /* No H Channels */
> +		0, /* No UH Channels */
> +	},
> +	.soc_data = &am62a_dmss_csi_soc_data,
> +};
> +
>  static struct udma_match_data am64_bcdma_data = {
>  	.type = DMA_TYPE_BCDMA,
>  	.psil_base = 0x2000, /* for tchan and rchan, not applicable to bchan */
> @@ -4344,6 +4364,10 @@ static const struct of_device_id udma_of_match[] = {
>  		.compatible = "ti,am64-dmss-pktdma",
>  		.data = &am64_pktdma_data,
>  	},
> +	{
> +		.compatible = "ti,am62a-dmss-bcdma-csirx",
> +		.data = &am62a_bcdma_csirx_data,
> +	},
>  	{ /* Sentinel */ },
>  };
>  
> @@ -5272,12 +5296,15 @@ static int udma_probe(struct platform_device *pdev)
>  	}
>  	ud->match_data = match->data;
>  
> -	soc = soc_device_match(k3_soc_devices);
> -	if (!soc) {
> -		dev_err(dev, "No compatible SoC found\n");
> -		return -ENODEV;
> +	ud->soc_data = ud->match_data->soc_data;
> +	if (!ud->soc_data) {
> +		soc = soc_device_match(k3_soc_devices);
> +		if (!soc) {
> +			dev_err(dev, "No compatible SoC found\n");
> +			return -ENODEV;
> +		}
> +		ud->soc_data = soc->data;
>  	}
> -	ud->soc_data = soc->data;

Right, the original design was based on the promise that a DMSS will
contain maximum 1 BCDMA and/or 1 PKTDMA, looks like now a DMSS have 2
BCDMAs?

The only possible issue I can see is that if in future SoCs the Output
Event Offsets got shuffled for the BCDMAs, but then a new compatible for
each SoC might just work.

Nice solution with minimal change! ;)

>  
>  	ret = udma_get_mmrs(pdev, ud);
>  	if (ret)

-- 
Péter

Re: [PATCH 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX

[Vignesh Raghavendra]

On 10/12/22 14:19, Péter Ujfalusi wrote:
> 
> 
> On 12/6/22 06:35, Vignesh Raghavendra wrote:
>> BCDMA CSI RX present on AM62Ax SoC is a dedicated DMA for servicing
>> Camera Serial Interface (CSI) IP. Add support for the same.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>  drivers/dma/ti/k3-udma.c | 37 ++++++++++++++++++++++++++++++++-----
>>  1 file changed, 32 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
>> index 19fce52a9b53..a8b497ed3f30 100644
>> --- a/drivers/dma/ti/k3-udma.c
>> +++ b/drivers/dma/ti/k3-udma.c
>> @@ -135,6 +135,7 @@ struct udma_match_data {
>>  	u32 flags;
>>  	u32 statictr_z_mask;
>>  	u8 burst_size[3];
>> +	struct udma_soc_data *soc_data;
>>  };
>>  
>>  struct udma_soc_data {
>> @@ -4295,6 +4296,25 @@ static struct udma_match_data j721e_mcu_data = {
>>  	},
>>  };
>>  
>> +static struct udma_soc_data am62a_dmss_csi_soc_data = {
>> +	.oes = {
>> +		.bcdma_rchan_data = 0xe00,
>> +		.bcdma_rchan_ring = 0x1000,
>> +	},
>> +};
>> +
>> +static struct udma_match_data am62a_bcdma_csirx_data = {
>> +	.type = DMA_TYPE_BCDMA,
>> +	.psil_base = 0x3100,
>> +	.enable_memcpy_support = false,
>> +	.burst_size = {
>> +		TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */
>> +		0, /* No H Channels */
>> +		0, /* No UH Channels */
>> +	},
>> +	.soc_data = &am62a_dmss_csi_soc_data,
>> +};
>> +
>>  static struct udma_match_data am64_bcdma_data = {
>>  	.type = DMA_TYPE_BCDMA,
>>  	.psil_base = 0x2000, /* for tchan and rchan, not applicable to bchan */
>> @@ -4344,6 +4364,10 @@ static const struct of_device_id udma_of_match[] = {
>>  		.compatible = "ti,am64-dmss-pktdma",
>>  		.data = &am64_pktdma_data,
>>  	},
>> +	{
>> +		.compatible = "ti,am62a-dmss-bcdma-csirx",
>> +		.data = &am62a_bcdma_csirx_data,
>> +	},
>>  	{ /* Sentinel */ },
>>  };
>>  
>> @@ -5272,12 +5296,15 @@ static int udma_probe(struct platform_device *pdev)
>>  	}
>>  	ud->match_data = match->data;
>>  
>> -	soc = soc_device_match(k3_soc_devices);
>> -	if (!soc) {
>> -		dev_err(dev, "No compatible SoC found\n");
>> -		return -ENODEV;
>> +	ud->soc_data = ud->match_data->soc_data;
>> +	if (!ud->soc_data) {
>> +		soc = soc_device_match(k3_soc_devices);
>> +		if (!soc) {
>> +			dev_err(dev, "No compatible SoC found\n");
>> +			return -ENODEV;
>> +		}
>> +		ud->soc_data = soc->data;
>>  	}
>> -	ud->soc_data = soc->data;
> 
> Right, the original design was based on the promise that a DMSS will
> contain maximum 1 BCDMA and/or 1 PKTDMA, looks like now a DMSS have 2
> BCDMAs?
> 

Thats correct. IPs requiring dedicated B/W paths (its just CSI today)
would probably have dedicated BCDMA.

> The only possible issue I can see is that if in future SoCs the Output
> Event Offsets got shuffled for the BCDMAs, but then a new compatible for
> each SoC might just work.
> 

We have ensured all BCDMAs for CSI follow the same offsets across the
SoCs. So, this compatible should work for all BCDMA_CSIs. But yes, this
can be expanded by adding new compatible is third BCDMA variant shows up
(doesn't exist today though).

> Nice solution with minimal change! ;)

Thanks! appreciate the review comments.


> 
>>  
>>  	ret = udma_get_mmrs(pdev, ud);
>>  	if (ret)
> 

-- 
Regards
Vignesh