From: Walker Chen <walker.chen@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <linux-pm@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor.dooley@microchip.com>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Walker Chen <walker.chen@starfivetech.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v1 3/3] riscv: dts: starfive: add pmu controller node
Date: Thu, 8 Dec 2022 16:29:55 +0800 [thread overview]
Message-ID: <20221208082955.10653-4-walker.chen@starfivetech.com> (raw)
In-Reply-To: <20221208082955.10653-1-walker.chen@starfivetech.com>
This adds the pmu controller node for the Starfive JH7110 SoC. The PMU
needs to be used by other modules such as ISP, VPU, etc.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index c22e8f1d2640..fa7b60b82d71 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -356,6 +356,13 @@
#gpio-cells = <2>;
};
+ pwrc: power-controller@17030000 {
+ compatible = "starfive,jh7110-pmu";
+ reg = <0x0 0x17030000 0x0 0x10000>;
+ interrupts = <111>;
+ #power-domain-cells = <1>;
+ };
+
uart0: serial@10000000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x10000000 0x0 0x10000>;
--
2.17.1
prev parent reply other threads:[~2022-12-08 8:30 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-08 8:29 [PATCH v1 0/3] JH7110 PMU Support Walker Chen
2022-12-08 8:29 ` [PATCH v1 1/3] dt-bindings: power: Add starfive,jh71xx-pmu Walker Chen
2022-12-08 8:29 ` [PATCH v1 2/3] soc: starfive: Add StarFive JH71XX pmu driver Walker Chen
2022-12-08 8:29 ` Walker Chen [this message]
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