From: Sudip Mukherjee <sudip.mukherjee@sifive.com>
To: Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com,
jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Sudip Mukherjee <sudip.mukherjee@sifive.com>
Subject: [PATCH v2 10/15] spi: dw: Calculate Receive FIFO Threshold Level
Date: Mon, 12 Dec 2022 18:07:27 +0000 [thread overview]
Message-ID: <20221212180732.79167-11-sudip.mukherjee@sifive.com> (raw)
In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com>
In enhanced mode we need to calculate RXFTLR based on the length of data
we are expecting to receive or the fifo length.
Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
---
drivers/spi/spi-dw-core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 10d453228368f..75f5ce5f377ca 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -428,6 +428,14 @@ static void dw_spi_irq_setup(struct dw_spi *dws,
*/
level = min_t(u16, dws->fifo_len / 2, dws->tx_len);
dw_writel(dws, DW_SPI_TXFTLR, level);
+
+ /*
+ * In enhanced mode if we are reading then tx_len is 0 as we
+ * have nothing to transmit. Calculate DW_SPI_RXFTLR with
+ * rx_len.
+ */
+ if (t_handler == dw_spi_enh_handler)
+ level = min_t(u16, dws->fifo_len / 2, dws->rx_len);
dw_writel(dws, DW_SPI_RXFTLR, level - 1);
dws->transfer_handler = t_handler;
--
2.30.2
next prev parent reply other threads:[~2022-12-12 18:09 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-12 18:07 [PATCH v2 00/15] Add support for enhanced SPI for Designware SPI controllers Sudip Mukherjee
2022-12-12 18:07 ` [PATCH v2 01/15] spi: dw: Introduce spi_frf and STD_SPI Sudip Mukherjee
2023-01-09 16:43 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 02/15] spi: dw: update NDF while using enhanced spi mode Sudip Mukherjee
2023-01-09 16:52 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 03/15] spi: dw: update SPI_CTRLR0 register Sudip Mukherjee
2023-01-09 17:06 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 04/15] spi: dw: add check for support of enhanced spi Sudip Mukherjee
2023-01-09 17:34 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 05/15] spi: dw: Introduce enhanced mem_op Sudip Mukherjee
2023-01-10 11:10 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 06/15] spi: dw: Introduce dual/quad/octal spi Sudip Mukherjee
2023-01-10 11:40 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 07/15] spi: dw: send cmd and addr to start the spi transfer Sudip Mukherjee
2023-01-10 11:42 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 08/15] spi: dw: update irq setup to use multiple handler Sudip Mukherjee
2023-01-10 11:46 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 09/15] spi: dw: use irq handler for enhanced spi Sudip Mukherjee
2023-01-10 12:08 ` Serge Semin
2022-12-12 18:07 ` Sudip Mukherjee [this message]
2022-12-12 18:07 ` [PATCH v2 11/15] spi: dw: adjust size of mem_op Sudip Mukherjee
2022-12-12 18:07 ` [PATCH v2 12/15] spi: dw: Add retry for enhanced spi mode Sudip Mukherjee
2023-01-10 12:10 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 13/15] spi: dw: detect " Sudip Mukherjee
2023-01-10 12:20 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 14/15] spi: dt-bindings: snps,dw-ahb-ssi: Add generic dw-ahb-ssi version Sudip Mukherjee
2022-12-13 16:32 ` Rob Herring
2022-12-13 16:59 ` Mark Brown
2022-12-13 17:47 ` Sudip Mukherjee
2022-12-13 18:29 ` Serge Semin
2022-12-12 18:07 ` [PATCH v2 15/15] spi: dw: initialize dwc-ssi controller Sudip Mukherjee
2022-12-18 17:45 ` [PATCH v2 00/15] Add support for enhanced SPI for Designware SPI controllers Serge Semin
2023-01-04 22:20 ` Serge Semin
2023-01-09 16:25 ` Serge Semin
2023-01-19 16:26 ` Sudip Mukherjee
2023-01-19 16:37 ` Serge Semin
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