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From: Stephen Boyd <sboyd@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>,
	Sean Anderson <sean.anderson@seco.com>,
	Vinod Koul <vkoul@kernel.org>,
	linux-phy@lists.infradead.org
Cc: Rob Herring <robh+dt@kernel.org>,
	Bagas Sanjaya <bagasdotme@gmail.com>,
	devicetree@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	linuxppc-dev@lists.ozlabs.org,
	Ioana Ciornei <ioana.ciornei@nxp.com>,
	linux-arm-kernel@lists.infradead.org,
	Camelia Alexandra Groza <camelia.groza@nxp.com>,
	Madalin Bucur <madalin.bucur@nxp.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org, linux-doc@vger.kernel.org
Subject: Re: [PATCH v8 4/9] phy: fsl: Add Lynx 10G SerDes driver
Date: Mon, 12 Dec 2022 15:37:04 -0800	[thread overview]
Message-ID: <20221212233706.6C419C433D2@smtp.kernel.org> (raw)
In-Reply-To: <8b42763d-5fc3-3853-c421-227494c0144a@seco.com>

Quoting Sean Anderson (2022-12-08 07:36:45)
> On 12/6/22 21:17, Stephen Boyd wrote:
> > Quoting Sean Anderson (2022-11-01 16:27:21)
> >> On 11/1/22 16:10, Stephen Boyd wrote:
> >> >> 
> >> >> Oh, I remember why I did this. I need the reference clock for clk_hw_round_rate,
> >> >> which is AFAICT the only correct way to implement round_rate.
> >> >> 
> >> > 
> >> > Is the reference clk the parent of the clk implementing
> >> > clk_ops::round_rate()?
> >> 
> >> Yes. We may be able to produce a given output with multiple reference
> >> rates. However, the clock API provides no mechanism to say "Don't ask
> >> for the parent clock to be rate X, you just tried it and the parent
> >> clock can't support it." So instead, we loop over the possible reference
> >> rates and pick the first one which the parent says it can round to.
> >> 
> > 
> > Sorry, I'm lost. Why can't you loop over possible reference rates in
> > determine_rate/round_rate clk op here?
> 
> This is what I do currently, but you need to have the parent clock to do
> so. With your suggested method, we never actually get a struct clk(_hw)
> which we can query for rate support.

The clk_hw for the parent is given to the determine_rate clk_op in the
clk_rate_request structure. It's stored in the best_parent_hw pointer
when the determine_rate function is called. Does that work for you?

  reply	other threads:[~2022-12-12 23:37 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27 19:11 [PATCH v8 0/9] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-10-27 19:11 ` [PATCH v8 1/9] dt-bindings: phy: Add 2500BASE-X and 10GBASE-R Sean Anderson
2022-10-27 19:11 ` [PATCH v8 2/9] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-10-27 19:11 ` [PATCH v8 3/9] dt-bindings: clock: Add ids for Lynx 10g PLLs Sean Anderson
2022-10-27 21:49   ` Stephen Boyd
2022-10-27 21:59     ` Sean Anderson
2022-10-27 19:11 ` [PATCH v8 4/9] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-10-27 23:03   ` Stephen Boyd
2022-10-28 16:13     ` Sean Anderson
2022-10-28 16:33       ` Sean Anderson
2022-11-01 20:10         ` Stephen Boyd
2022-11-01 23:27           ` Sean Anderson
2022-12-07  2:17             ` Stephen Boyd
2022-12-08 15:36               ` Sean Anderson
2022-12-12 23:37                 ` Stephen Boyd [this message]
2022-12-13 22:34                   ` Sean Anderson
2022-11-01 20:07       ` Stephen Boyd
2022-11-01 23:41         ` Sean Anderson
2022-10-29  9:11   ` Bagas Sanjaya
2022-10-31 15:33     ` Sean Anderson
2022-10-27 19:11 ` [PATCH v8 5/9] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
2022-10-27 19:11 ` [PATCH v8 6/9] arm64: dts: ls1046ardb: " Sean Anderson
2022-10-27 19:11 ` [PATCH v8 7/9] arm64: dts: ls1088a: " Sean Anderson
2022-10-27 19:11 ` [PATCH v8 8/9] arm64: dts: ls1088a: Prevent PCSs from probing as phys Sean Anderson
2022-10-27 19:11 ` [PATCH v8 9/9] [DO NOT MERGE] arm64: dts: ls1088ardb: Add serdes bindings Sean Anderson

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