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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id i15-20020a056808054f00b0035468f2d410sm4656516oig.55.2022.12.13.07.40.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Dec 2022 07:40:50 -0800 (PST) Received: (nullmailer pid 1471363 invoked by uid 1000); Tue, 13 Dec 2022 15:40:49 -0000 Date: Tue, 13 Dec 2022 09:40:49 -0600 From: Rob Herring To: Krzysztof Kozlowski Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Daniel Lezcano , Thomas Gleixner , Krzysztof Kozlowski , Wim Van Sebroeck , Guenter Roeck , Prakash Ranjan , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: Re: [PATCH 06/12] dt-bindings: watchdog: qcom-wdt: merge MSM timer Message-ID: <20221213154049.GA1426116-robh@kernel.org> References: <20221212163532.142533-1-krzysztof.kozlowski@linaro.org> <20221212163532.142533-6-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221212163532.142533-6-krzysztof.kozlowski@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Dec 12, 2022 at 05:35:26PM +0100, Krzysztof Kozlowski wrote: > Merge Qualcomm MSM timer bindings into watchdog, because the timer > compatibles are already included here and the hardware is quite similar. > > While converting the MSM timer bindings, adjust clock-frequency > property to take only one frequency, instead of two, because: > 1. DT schema does not allow to frequencies, > 2. The Linux timer driver reads only first frequency. > > Signed-off-by: Krzysztof Kozlowski > --- > .../bindings/timer/qcom,msm-timer.txt | 47 ------------------ > .../bindings/watchdog/qcom-wdt.yaml | 49 +++++++++++++++++++ > 2 files changed, 49 insertions(+), 47 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/timer/qcom,msm-timer.txt > > diff --git a/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt b/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt > deleted file mode 100644 > index 5e10c345548f..000000000000 > --- a/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt > +++ /dev/null > @@ -1,47 +0,0 @@ > -* MSM Timer > - > -Properties: > - > -- compatible : Should at least contain "qcom,msm-timer". More specific > - properties specify which subsystem the timers are paired with. > - > - "qcom,kpss-timer" - krait subsystem > - "qcom,scss-timer" - scorpion subsystem > - > -- interrupts : Interrupts for the debug timer, the first general purpose > - timer, and optionally a second general purpose timer, and > - optionally as well, 2 watchdog interrupts, in that order. > - > -- reg : Specifies the base address of the timer registers. > - > -- clocks: Reference to the parent clocks, one per output clock. The parents > - must appear in the same order as the clock names. > - > -- clock-names: The name of the clocks as free-form strings. They should be in > - the same order as the clocks. > - > -- clock-frequency : The frequency of the debug timer and the general purpose > - timer(s) in Hz in that order. > - > -Optional: > - > -- cpu-offset : per-cpu offset used when the timer is accessed without the > - CPU remapping facilities. The offset is > - cpu-offset + (0x10000 * cpu-nr). > - > -Example: > - > - timer@200a000 { > - compatible = "qcom,scss-timer", "qcom,msm-timer"; > - interrupts = <1 1 0x301>, > - <1 2 0x301>, > - <1 3 0x301>, > - <1 4 0x301>, > - <1 5 0x301>; > - reg = <0x0200a000 0x100>; > - clock-frequency = <19200000>, > - <32768>; > - clocks = <&sleep_clk>; > - clock-names = "sleep"; > - cpu-offset = <0x40000>; > - }; > diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > index b7fc57f4800e..697caf1937cc 100644 > --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > @@ -10,6 +10,9 @@ maintainers: > - Sai Prakash Ranjan > > properties: > + $nodename: > + pattern: "^(watchdog|timer)@[0-9a-f]+$" > + > compatible: > oneOf: > - items: > @@ -48,6 +51,20 @@ properties: > clocks: > maxItems: 1 > > + clock-names: > + items: > + - const: sleep > + > + clock-frequency: > + description: > + The frequency of the general purpose timer in Hz in that order. 'in that order'? > + > + cpu-offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: > + Per-CPU offset used when the timer is accessed without the CPU remapping > + facilities. The offset is cpu-offset + (0x10000 * cpu-nr). > + > interrupts: > minItems: 1 > maxItems: 5 > @@ -67,12 +84,27 @@ allOf: > const: qcom,kpss-wdt > then: > properties: > + clock-frequency: false > + cpu-offset: false > interrupts: > minItems: 1 > items: > - description: Bark > - description: Bite > > + else: > + properties: > + interrupts: > + minItems: 3 > + items: > + - description: Debug > + - description: First general purpose timer > + - description: Second general purpose timer > + - description: First watchdog > + - description: Second watchdog Okay, here they are. No need to set it to 2 then change to 5 in the series. > + required: > + - clock-frequency > + > unevaluatedProperties: false > > examples: > @@ -86,3 +118,20 @@ examples: > interrupts = ; > timeout-sec = <10>; > }; > + > + - | > + #include > + > + watchdog@200a000 { > + compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer"; > + interrupts = , > + , > + , > + , > + ; > + reg = <0x0200a000 0x100>; > + clock-frequency = <25000000>; > + clocks = <&sleep_clk>; > + clock-names = "sleep"; > + cpu-offset = <0x80000>; > + }; > -- > 2.34.1 > >