From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: qcom: qcs404: register PCIe PHY as a clock provider
Date: Sat, 17 Dec 2022 01:40:27 +0200 [thread overview]
Message-ID: <20221216234027.539917-3-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221216234027.539917-1-dmitry.baryshkov@linaro.org>
Add #clock-cells to the pcie_phy node. It provides a PCIe PIPE clock.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index a5324eecb50a..ffffaa7507cf 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -810,6 +810,7 @@ pcie_phy: phy@7786000 {
reset-names = "phy", "pipe";
clock-output-names = "pcie_0_pipe_clk";
+ #clock-cells = <0>;
#phy-cells = <0>;
status = "disabled";
--
2.35.1
next prev parent reply other threads:[~2022-12-16 23:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-16 23:40 [PATCH 1/3] dt-bindings: phy: qcom,pcie2-phy: convert to YAML format Dmitry Baryshkov
2022-12-16 23:40 ` [PATCH 2/3] phy: qualcomm: pcie2: register as clock provider Dmitry Baryshkov
2022-12-16 23:40 ` Dmitry Baryshkov [this message]
2022-12-17 15:01 ` [PATCH 3/3] arm64: dts: qcom: qcs404: register PCIe PHY as a " Konrad Dybcio
2022-12-20 10:39 ` Krzysztof Kozlowski
2022-12-19 9:16 ` [PATCH 1/3] dt-bindings: phy: qcom,pcie2-phy: convert to YAML format Krzysztof Kozlowski
2022-12-27 18:03 ` (subset) " Bjorn Andersson
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