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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id r43-20020a05687108ab00b001428eb454e9sm1603705oaq.13.2022.12.16.15.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 15:42:21 -0800 (PST) Received: (nullmailer pid 88182 invoked by uid 1000); Fri, 16 Dec 2022 23:42:20 -0000 Date: Fri, 16 Dec 2022 17:42:20 -0600 From: Rob Herring To: Eugen Hristev Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, luis.oliveira@synopsys.com Subject: Re: [PATCH v5 2/4] dt-bindings: phy: Document the Synopsys MIPI DPHY Rx bindings Message-ID: <20221216234220.GB80712-robh@kernel.org> References: <20221216143717.1002015-1-eugen.hristev@microchip.com> <20221216143717.1002015-3-eugen.hristev@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221216143717.1002015-3-eugen.hristev@microchip.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Dec 16, 2022 at 04:37:15PM +0200, Eugen Hristev wrote: > From: Luis Oliveira > > Add device-tree bindings documentation for SNPS DesignWare MIPI D-PHY in > RX mode. > > Signed-off-by: Luis Oliveira > --- > .../bindings/phy/snps,dw-dphy-rx.txt | 29 +++++++++++++++++++ > 1 file changed, 29 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt > > diff --git a/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt > new file mode 100644 > index 000000000000..ffb64fe5cbd1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt > @@ -0,0 +1,29 @@ > +Synopsys DesignWare MIPI Rx D-PHY block details > + > +Description > +----------- > + > +The Synopsys MIPI D-PHY controller supports MIPI-DPHY in receiver mode. > +Please refer to phy-bindings.txt for more information. > + > +Required properties: > +- compatible : Shall be "snps,dw-dphy-rx". > +- #phy-cells : Must be 1. There is more than 1 lane/phy for a single instance? > +- bus-width : Size of the test interface data bus (8 bits->8 or > + 12bits->12). Do we need a test interface upstream? If so, needs a vendor prefix. > +- snps,dphy-frequency : Frequency at which D-PHY should start, configurable. > + Check Synopsys databook. (-kHz) Is this frequency of the link? We have properties for that. Or this should somehow be using the clock binding. And anything with units should have a unit suffix as defined in property-units.yaml. > +- reg : Test interface register. This correspondes to the > + physical base address of the controller and size of > + the device memory mapped registers; Check Synopsys > + databook. > + > +Example: > + > + mipi_dphy_rx1: dphy@d00003040 { > + compatible = "snps,dw-dphy-rx"; > + #phy-cells = <1>; > + bus-width = <12>; > + snps,dphy-frequency = <300000>; > + reg = <0xd0003040 0x20>; > + }; > -- > 2.25.1 > >