* [PATCH AUTOSEL 6.1 3/9] ARM: dts: aspeed: rainier,everest: Move reserved memory regions [not found] <20221217000937.41115-1-sashal@kernel.org> @ 2022-12-17 0:09 ` Sasha Levin 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 7/9] arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards Sasha Levin ` (2 subsequent siblings) 3 siblings, 0 replies; 7+ messages in thread From: Sasha Levin @ 2022-12-17 0:09 UTC (permalink / raw) To: linux-kernel, stable Cc: Adriana Kobylak, Andrew Jeffery, Joel Stanley, Sasha Levin, robh+dt, krzysztof.kozlowski+dt, keescook, devicetree, linux-arm-kernel, linux-aspeed, linux-hardening From: Adriana Kobylak <anoo@us.ibm.com> [ Upstream commit e184d42a6e085f95f5c4f1a4fbabebab2984cb68 ] Move the reserved regions to account for a decrease in DRAM when ECC is enabled. ECC takes 1/9th of memory. Running on HW with ECC off, u-boot prints: DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:off) And with ECC on, u-boot prints: DRAM: already initialized, 896 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:on, ECC size:896 MiB) This implies that MCR54 is configured for ECC to be bounded at the bottom of a 16MiB VGA memory region: 1024MiB - 16MiB (VGA) = 1008MiB 1008MiB / 9 (for ECC) = 112MiB 1008MiB - 112MiB = 896MiB (available DRAM) The flash_memory region currently starts at offset 896MiB: 0xb8000000 (flash_memory offset) - 0x80000000 (base memory address) = 0x38000000 = 896MiB This is the end of the available DRAM with ECC enabled and therefore it needs to be moved. Since the flash_memory is 64MiB in size and needs to be 64MiB aligned, it can just be moved up by 64MiB and would sit right at the end of the available DRAM buffer. The ramoops region currently follows the flash_memory, but it can be moved to sit above flash_memory which would minimize the address-space fragmentation. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220916195535.1020185-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Sasha Levin <sashal@kernel.org> --- arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 17 ++++++++--------- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 16 +++++++++------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index a6a2bc3b855c..fcc890e3ad73 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -162,16 +162,9 @@ reserved-memory { #size-cells = <1>; ranges; - /* LPC FW cycle bridge region requires natural alignment */ - flash_memory: region@b8000000 { - no-map; - reg = <0xb8000000 0x04000000>; /* 64M */ - }; - - /* 48MB region from the end of flash to start of vga memory */ - ramoops@bc000000 { + ramoops@b3e00000 { compatible = "ramoops"; - reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */ + reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ record-size = <0x8000>; console-size = <0x8000>; ftrace-size = <0x8000>; @@ -179,6 +172,12 @@ ramoops@bc000000 { max-reason = <3>; /* KMSG_DUMP_EMERG */ }; + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region@b4000000 { + no-map; + reg = <0xb4000000 0x04000000>; /* 64M */ + }; + /* VGA region is dictated by hardware strapping */ vga_memory: region@bf000000 { no-map; diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index bf59a9962379..4879da4cdbd2 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -95,14 +95,9 @@ reserved-memory { #size-cells = <1>; ranges; - flash_memory: region@b8000000 { - no-map; - reg = <0xb8000000 0x04000000>; /* 64M */ - }; - - ramoops@bc000000 { + ramoops@b3e00000 { compatible = "ramoops"; - reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */ + reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ record-size = <0x8000>; console-size = <0x8000>; ftrace-size = <0x8000>; @@ -110,6 +105,13 @@ ramoops@bc000000 { max-reason = <3>; /* KMSG_DUMP_EMERG */ }; + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region@b4000000 { + no-map; + reg = <0xb4000000 0x04000000>; /* 64M */ + }; + + /* VGA region is dictated by hardware strapping */ vga_memory: region@bf000000 { no-map; compatible = "shared-dma-pool"; -- 2.35.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH AUTOSEL 6.1 7/9] arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards [not found] <20221217000937.41115-1-sashal@kernel.org> 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 3/9] ARM: dts: aspeed: rainier,everest: Move reserved memory regions Sasha Levin @ 2022-12-17 0:09 ` Sasha Levin 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes Sasha Levin 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 9/9] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes Sasha Levin 3 siblings, 0 replies; 7+ messages in thread From: Sasha Levin @ 2022-12-17 0:09 UTC (permalink / raw) To: linux-kernel, stable Cc: Krzysztof Kozlowski, Konrad Dybcio, Bjorn Andersson, Sasha Levin, agross, robh+dt, krzysztof.kozlowski+dt, linux-arm-msm, devicetree From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [ Upstream commit 9d561dc4e5cc31e757f91eb7bb709d2e2a8c9ce0 ] SDHCI on SM8450 HDK also has problems with SDR104/SDR50: mmc0: card never left busy state mmc0: error -110 whilst initialising SD card so I think it is safe to assume this issue affects all SM8450 boards. Move the quirk disallowing these modes to the SoC DTSI, to spare people working on other boards the misery of debugging this issue. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026200357.391635-3-krzysztof.kozlowski@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org> --- arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts | 2 -- arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 +++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts index d68765eb6d4f..6351050bc87f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts @@ -556,8 +556,6 @@ &sdhc_2 { pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; vmmc-supply = <&pm8350c_l9>; vqmmc-supply = <&pm8350c_l6>; - /* Forbid SDR104/SDR50 - broken hw! */ - sdhci-caps-mask = <0x3 0x0>; no-sdio; no-mmc; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d32f08df743d..a91c40e4885f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3192,6 +3192,9 @@ sdhc_2: sdhci@8804000 { bus-width = <4>; dma-coherent; + /* Forbid SDR104/SDR50 - broken hw! */ + sdhci-caps-mask = <0x3 0x0>; + status = "disabled"; sdhc2_opp_table: opp-table { -- 2.35.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes [not found] <20221217000937.41115-1-sashal@kernel.org> 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 3/9] ARM: dts: aspeed: rainier,everest: Move reserved memory regions Sasha Levin 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 7/9] arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards Sasha Levin @ 2022-12-17 0:09 ` Sasha Levin 2022-12-20 0:01 ` Andre Przywara 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 9/9] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes Sasha Levin 3 siblings, 1 reply; 7+ messages in thread From: Sasha Levin @ 2022-12-17 0:09 UTC (permalink / raw) To: linux-kernel, stable Cc: Andre Przywara, Jernej Skrabec, Sasha Levin, robh+dt, krzysztof.kozlowski+dt, wens, samuel, devicetree, linux-arm-kernel, linux-sunxi From: Andre Przywara <andre.przywara@arm.com> [ Upstream commit f40cf244c3feb4e1a442f8029b691add2c65b3ab ] Add the nodes for the MUSB and the four USB host controllers to the SoC .dtsi, along with the PHY node needed to bind all of them together. EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY requires some quirks (handled in the driver). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org> --- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++ 1 file changed, 160 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 622a1f7d1641..74aed0d232a9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -504,6 +504,166 @@ mdio0: mdio { }; }; + usbotg: usb@5100000 { + compatible = "allwinner,sun50i-h616-musb", + "allwinner,sun8i-h3-musb"; + reg = <0x05100000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@5100400 { + compatible = "allwinner,sun50i-h616-usb-phy"; + reg = <0x05100400 0x24>, + <0x05101800 0x14>, + <0x05200800 0x14>, + <0x05310800 0x14>, + <0x05311800 0x14>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1", + "pmu2", + "pmu3"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>, + <&ccu CLK_USB_PHY2>, + <&ccu CLK_USB_PHY3>, + <&ccu CLK_BUS_EHCI2>; + clock-names = "usb0_phy", + "usb1_phy", + "usb2_phy", + "usb3_phy", + "pmu2_clk"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>, + <&ccu RST_USB_PHY2>, + <&ccu RST_USB_PHY3>; + reset-names = "usb0_reset", + "usb1_reset", + "usb2_reset", + "usb3_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@5101000 { + compatible = "allwinner,sun50i-h616-ehci", + "generic-ehci"; + reg = <0x05101000 0x100>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@5101400 { + compatible = "allwinner,sun50i-h616-ohci", + "generic-ohci"; + reg = <0x05101400 0x100>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@5200000 { + compatible = "allwinner,sun50i-h616-ehci", + "generic-ehci"; + reg = <0x05200000 0x100>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@5200400 { + compatible = "allwinner,sun50i-h616-ohci", + "generic-ohci"; + reg = <0x05200400 0x100>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci2: usb@5310000 { + compatible = "allwinner,sun50i-h616-ehci", + "generic-ehci"; + reg = <0x05310000 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI2>, + <&ccu CLK_BUS_EHCI2>, + <&ccu CLK_USB_OHCI2>; + resets = <&ccu RST_BUS_OHCI2>, + <&ccu RST_BUS_EHCI2>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci2: usb@5310400 { + compatible = "allwinner,sun50i-h616-ohci", + "generic-ohci"; + reg = <0x05310400 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI2>, + <&ccu CLK_USB_OHCI2>; + resets = <&ccu RST_BUS_OHCI2>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci3: usb@5311000 { + compatible = "allwinner,sun50i-h616-ehci", + "generic-ehci"; + reg = <0x05311000 0x100>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI3>, + <&ccu CLK_BUS_EHCI3>, + <&ccu CLK_USB_OHCI3>; + resets = <&ccu RST_BUS_OHCI3>, + <&ccu RST_BUS_EHCI3>; + phys = <&usbphy 3>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci3: usb@5311400 { + compatible = "allwinner,sun50i-h616-ohci", + "generic-ohci"; + reg = <0x05311400 0x100>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI3>, + <&ccu CLK_USB_OHCI3>; + resets = <&ccu RST_BUS_OHCI3>; + phys = <&usbphy 3>; + phy-names = "usb"; + status = "disabled"; + }; + rtc: rtc@7000000 { compatible = "allwinner,sun50i-h616-rtc"; reg = <0x07000000 0x400>; -- 2.35.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes Sasha Levin @ 2022-12-20 0:01 ` Andre Przywara 2022-12-20 6:48 ` Icenowy Zheng 0 siblings, 1 reply; 7+ messages in thread From: Andre Przywara @ 2022-12-20 0:01 UTC (permalink / raw) To: Sasha Levin Cc: linux-kernel, stable, Jernej Skrabec, robh+dt, krzysztof.kozlowski+dt, wens, samuel, devicetree, linux-arm-kernel, linux-sunxi On Fri, 16 Dec 2022 19:09:35 -0500 Sasha Levin <sashal@kernel.org> wrote: > From: Andre Przywara <andre.przywara@arm.com> > > [ Upstream commit f40cf244c3feb4e1a442f8029b691add2c65b3ab ] This is not really a backport candidate: - This is not a fix, but a new feature. - This relies on the H616 USB PHY support patch, which will be only in v6.2 (and won't be backported). - DT backports are generally not useful to begin with, and should actually not be necessary anyway. Cheers, Andre > > Add the nodes for the MUSB and the four USB host controllers to the SoC > .dtsi, along with the PHY node needed to bind all of them together. > > EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY requires > some quirks (handled in the driver). > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> > Link: https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> > Signed-off-by: Sasha Levin <sashal@kernel.org> > --- > .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++ > 1 file changed, 160 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > index 622a1f7d1641..74aed0d232a9 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > @@ -504,6 +504,166 @@ mdio0: mdio { > }; > }; > > + usbotg: usb@5100000 { > + compatible = "allwinner,sun50i-h616-musb", > + "allwinner,sun8i-h3-musb"; > + reg = <0x05100000 0x0400>; > + clocks = <&ccu CLK_BUS_OTG>; > + resets = <&ccu RST_BUS_OTG>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "mc"; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + extcon = <&usbphy 0>; > + status = "disabled"; > + }; > + > + usbphy: phy@5100400 { > + compatible = "allwinner,sun50i-h616-usb-phy"; > + reg = <0x05100400 0x24>, > + <0x05101800 0x14>, > + <0x05200800 0x14>, > + <0x05310800 0x14>, > + <0x05311800 0x14>; > + reg-names = "phy_ctrl", > + "pmu0", > + "pmu1", > + "pmu2", > + "pmu3"; > + clocks = <&ccu CLK_USB_PHY0>, > + <&ccu CLK_USB_PHY1>, > + <&ccu CLK_USB_PHY2>, > + <&ccu CLK_USB_PHY3>, > + <&ccu CLK_BUS_EHCI2>; > + clock-names = "usb0_phy", > + "usb1_phy", > + "usb2_phy", > + "usb3_phy", > + "pmu2_clk"; > + resets = <&ccu RST_USB_PHY0>, > + <&ccu RST_USB_PHY1>, > + <&ccu RST_USB_PHY2>, > + <&ccu RST_USB_PHY3>; > + reset-names = "usb0_reset", > + "usb1_reset", > + "usb2_reset", > + "usb3_reset"; > + status = "disabled"; > + #phy-cells = <1>; > + }; > + > + ehci0: usb@5101000 { > + compatible = "allwinner,sun50i-h616-ehci", > + "generic-ehci"; > + reg = <0x05101000 0x100>; > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_BUS_EHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>, > + <&ccu RST_BUS_EHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci0: usb@5101400 { > + compatible = "allwinner,sun50i-h616-ohci", > + "generic-ohci"; > + reg = <0x05101400 0x100>; > + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI0>, > + <&ccu CLK_USB_OHCI0>; > + resets = <&ccu RST_BUS_OHCI0>; > + phys = <&usbphy 0>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ehci1: usb@5200000 { > + compatible = "allwinner,sun50i-h616-ehci", > + "generic-ehci"; > + reg = <0x05200000 0x100>; > + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_BUS_EHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>, > + <&ccu RST_BUS_EHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci1: usb@5200400 { > + compatible = "allwinner,sun50i-h616-ohci", > + "generic-ohci"; > + reg = <0x05200400 0x100>; > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI1>, > + <&ccu CLK_USB_OHCI1>; > + resets = <&ccu RST_BUS_OHCI1>; > + phys = <&usbphy 1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ehci2: usb@5310000 { > + compatible = "allwinner,sun50i-h616-ehci", > + "generic-ehci"; > + reg = <0x05310000 0x100>; > + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI2>, > + <&ccu CLK_BUS_EHCI2>, > + <&ccu CLK_USB_OHCI2>; > + resets = <&ccu RST_BUS_OHCI2>, > + <&ccu RST_BUS_EHCI2>; > + phys = <&usbphy 2>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci2: usb@5310400 { > + compatible = "allwinner,sun50i-h616-ohci", > + "generic-ohci"; > + reg = <0x05310400 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI2>, > + <&ccu CLK_USB_OHCI2>; > + resets = <&ccu RST_BUS_OHCI2>; > + phys = <&usbphy 2>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ehci3: usb@5311000 { > + compatible = "allwinner,sun50i-h616-ehci", > + "generic-ehci"; > + reg = <0x05311000 0x100>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI3>, > + <&ccu CLK_BUS_EHCI3>, > + <&ccu CLK_USB_OHCI3>; > + resets = <&ccu RST_BUS_OHCI3>, > + <&ccu RST_BUS_EHCI3>; > + phys = <&usbphy 3>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci3: usb@5311400 { > + compatible = "allwinner,sun50i-h616-ohci", > + "generic-ohci"; > + reg = <0x05311400 0x100>; > + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_OHCI3>, > + <&ccu CLK_USB_OHCI3>; > + resets = <&ccu RST_BUS_OHCI3>; > + phys = <&usbphy 3>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > rtc: rtc@7000000 { > compatible = "allwinner,sun50i-h616-rtc"; > reg = <0x07000000 0x400>; ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes 2022-12-20 0:01 ` Andre Przywara @ 2022-12-20 6:48 ` Icenowy Zheng 2022-12-23 14:09 ` Sasha Levin 0 siblings, 1 reply; 7+ messages in thread From: Icenowy Zheng @ 2022-12-20 6:48 UTC (permalink / raw) To: Andre Przywara, Sasha Levin Cc: linux-kernel, stable, Jernej Skrabec, robh+dt, krzysztof.kozlowski+dt, wens, samuel, devicetree, linux-arm-kernel, linux-sunxi 在 2022-12-20星期二的 00:01 +0000，Andre Przywara写道： > On Fri, 16 Dec 2022 19:09:35 -0500 > Sasha Levin <sashal@kernel.org> wrote: > > > From: Andre Przywara <andre.przywara@arm.com> > > > > [ Upstream commit f40cf244c3feb4e1a442f8029b691add2c65b3ab ] > > This is not really a backport candidate: > - This is not a fix, but a new feature. > - This relies on the H616 USB PHY support patch, which will be only > in > v6.2 (and won't be backported). > - DT backports are generally not useful to begin with, and should > actually not be necessary anyway. DT changes include fixes and new features. New features are not useful, but fixes are useful. This specific change is a new feature one, not a fix one though. > > Cheers, > Andre > > > > > Add the nodes for the MUSB and the four USB host controllers to the > > SoC > > .dtsi, along with the PHY node needed to bind all of them together. > > > > EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY > > requires > > some quirks (handled in the driver). > > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> > > Link: > > https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com > > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> > > Signed-off-by: Sasha Levin <sashal@kernel.org> > > --- > > .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 > > ++++++++++++++++++ > > 1 file changed, 160 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > > b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > > index 622a1f7d1641..74aed0d232a9 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi > > @@ -504,6 +504,166 @@ mdio0: mdio { > > }; > > }; > > > > + usbotg: usb@5100000 { > > + compatible = "allwinner,sun50i-h616-musb", > > + "allwinner,sun8i-h3-musb"; > > + reg = <0x05100000 0x0400>; > > + clocks = <&ccu CLK_BUS_OTG>; > > + resets = <&ccu RST_BUS_OTG>; > > + interrupts = <GIC_SPI 25 > > IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "mc"; > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > + extcon = <&usbphy 0>; > > + status = "disabled"; > > + }; > > + > > + usbphy: phy@5100400 { > > + compatible = "allwinner,sun50i-h616-usb- > > phy"; > > + reg = <0x05100400 0x24>, > > + <0x05101800 0x14>, > > + <0x05200800 0x14>, > > + <0x05310800 0x14>, > > + <0x05311800 0x14>; > > + reg-names = "phy_ctrl", > > + "pmu0", > > + "pmu1", > > + "pmu2", > > + "pmu3"; > > + clocks = <&ccu CLK_USB_PHY0>, > > + <&ccu CLK_USB_PHY1>, > > + <&ccu CLK_USB_PHY2>, > > + <&ccu CLK_USB_PHY3>, > > + <&ccu CLK_BUS_EHCI2>; > > + clock-names = "usb0_phy", > > + "usb1_phy", > > + "usb2_phy", > > + "usb3_phy", > > + "pmu2_clk"; > > + resets = <&ccu RST_USB_PHY0>, > > + <&ccu RST_USB_PHY1>, > > + <&ccu RST_USB_PHY2>, > > + <&ccu RST_USB_PHY3>; > > + reset-names = "usb0_reset", > > + "usb1_reset", > > + "usb2_reset", > > + "usb3_reset"; > > + status = "disabled"; > > + #phy-cells = <1>; > > + }; > > + > > + ehci0: usb@5101000 { > > + compatible = "allwinner,sun50i-h616-ehci", > > + "generic-ehci"; > > + reg = <0x05101000 0x100>; > > + interrupts = <GIC_SPI 26 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI0>, > > + <&ccu CLK_BUS_EHCI0>, > > + <&ccu CLK_USB_OHCI0>; > > + resets = <&ccu RST_BUS_OHCI0>, > > + <&ccu RST_BUS_EHCI0>; > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci0: usb@5101400 { > > + compatible = "allwinner,sun50i-h616-ohci", > > + "generic-ohci"; > > + reg = <0x05101400 0x100>; > > + interrupts = <GIC_SPI 27 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI0>, > > + <&ccu CLK_USB_OHCI0>; > > + resets = <&ccu RST_BUS_OHCI0>; > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ehci1: usb@5200000 { > > + compatible = "allwinner,sun50i-h616-ehci", > > + "generic-ehci"; > > + reg = <0x05200000 0x100>; > > + interrupts = <GIC_SPI 28 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI1>, > > + <&ccu CLK_BUS_EHCI1>, > > + <&ccu CLK_USB_OHCI1>; > > + resets = <&ccu RST_BUS_OHCI1>, > > + <&ccu RST_BUS_EHCI1>; > > + phys = <&usbphy 1>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci1: usb@5200400 { > > + compatible = "allwinner,sun50i-h616-ohci", > > + "generic-ohci"; > > + reg = <0x05200400 0x100>; > > + interrupts = <GIC_SPI 29 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI1>, > > + <&ccu CLK_USB_OHCI1>; > > + resets = <&ccu RST_BUS_OHCI1>; > > + phys = <&usbphy 1>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ehci2: usb@5310000 { > > + compatible = "allwinner,sun50i-h616-ehci", > > + "generic-ehci"; > > + reg = <0x05310000 0x100>; > > + interrupts = <GIC_SPI 30 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI2>, > > + <&ccu CLK_BUS_EHCI2>, > > + <&ccu CLK_USB_OHCI2>; > > + resets = <&ccu RST_BUS_OHCI2>, > > + <&ccu RST_BUS_EHCI2>; > > + phys = <&usbphy 2>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci2: usb@5310400 { > > + compatible = "allwinner,sun50i-h616-ohci", > > + "generic-ohci"; > > + reg = <0x05310400 0x100>; > > + interrupts = <GIC_SPI 31 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI2>, > > + <&ccu CLK_USB_OHCI2>; > > + resets = <&ccu RST_BUS_OHCI2>; > > + phys = <&usbphy 2>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ehci3: usb@5311000 { > > + compatible = "allwinner,sun50i-h616-ehci", > > + "generic-ehci"; > > + reg = <0x05311000 0x100>; > > + interrupts = <GIC_SPI 32 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI3>, > > + <&ccu CLK_BUS_EHCI3>, > > + <&ccu CLK_USB_OHCI3>; > > + resets = <&ccu RST_BUS_OHCI3>, > > + <&ccu RST_BUS_EHCI3>; > > + phys = <&usbphy 3>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci3: usb@5311400 { > > + compatible = "allwinner,sun50i-h616-ohci", > > + "generic-ohci"; > > + reg = <0x05311400 0x100>; > > + interrupts = <GIC_SPI 33 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_OHCI3>, > > + <&ccu CLK_USB_OHCI3>; > > + resets = <&ccu RST_BUS_OHCI3>; > > + phys = <&usbphy 3>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > rtc: rtc@7000000 { > > compatible = "allwinner,sun50i-h616-rtc"; > > reg = <0x07000000 0x400>; > > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes 2022-12-20 6:48 ` Icenowy Zheng @ 2022-12-23 14:09 ` Sasha Levin 0 siblings, 0 replies; 7+ messages in thread From: Sasha Levin @ 2022-12-23 14:09 UTC (permalink / raw) To: Icenowy Zheng Cc: Andre Przywara, linux-kernel, stable, Jernej Skrabec, robh+dt, krzysztof.kozlowski+dt, wens, samuel, devicetree, linux-arm-kernel, linux-sunxi On Tue, Dec 20, 2022 at 02:48:29PM +0800, Icenowy Zheng wrote: >在 2022-12-20星期二的 00:01 +0000，Andre Przywara写道： >> On Fri, 16 Dec 2022 19:09:35 -0500 >> Sasha Levin <sashal@kernel.org> wrote: >> >> > From: Andre Przywara <andre.przywara@arm.com> >> > >> > [ Upstream commit f40cf244c3feb4e1a442f8029b691add2c65b3ab ] >> >> This is not really a backport candidate: >> - This is not a fix, but a new feature. >> - This relies on the H616 USB PHY support patch, which will be only >> in >> v6.2 (and won't be backported). I'll go ahead and drop it. >> - DT backports are generally not useful to begin with, and should >> actually not be necessary anyway. > >DT changes include fixes and new features. New features are not useful, >but fixes are useful. > >This specific change is a new feature one, not a fix one though. Right - this is a similar issue to PCI/USB/etc IDs, or quirks - we try and backport patches that enable new hardware to work (proerly) with drivers that already exist in the kernel. -- Thanks, Sasha ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH AUTOSEL 6.1 9/9] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes [not found] <20221217000937.41115-1-sashal@kernel.org> ` (2 preceding siblings ...) 2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes Sasha Levin @ 2022-12-17 0:09 ` Sasha Levin 3 siblings, 0 replies; 7+ messages in thread From: Sasha Levin @ 2022-12-17 0:09 UTC (permalink / raw) To: linux-kernel, stable Cc: Marijn Suijten, Konrad Dybcio, Luca Weiss, Bjorn Andersson, Sasha Levin, agross, robh+dt, krzysztof.kozlowski+dt, linux-arm-msm, devicetree From: Marijn Suijten <marijn.suijten@somainline.org> [ Upstream commit 7372b944a6ba5ac86628eaacc89ed4f103435cb9 ] When enabling the APPS SMMU the mainline driver reconfigures the SMMU from its bootloader configuration, losing the stream mapping for (among which) the SDHCI hardware and breaking its ADMA feature. This feature can be disabled with: sdhci.debug_quirks=0x40 But it is of course desired to have this feature enabled and working through the SMMU. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4 Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221030073232.22726-11-marijn.suijten@somainline.org Signed-off-by: Sasha Levin <sashal@kernel.org> --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index c39de7d3ace0..df07ae42511d 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -485,6 +485,7 @@ sdhc_1: mmc@7c4000 { interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; + iommus = <&apps_smmu 0x60 0x0>; clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, @@ -1063,6 +1064,7 @@ sdhc_2: mmc@8804000 { interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; + iommus = <&apps_smmu 0x560 0x0>; clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>, -- 2.35.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-12-23 14:09 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 3/9] ARM: dts: aspeed: rainier,everest: Move reserved memory regions Sasha Levin
2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 7/9] arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards Sasha Levin
2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 8/9] arm64: dts: allwinner: h616: Add USB nodes Sasha Levin
2022-12-20 0:01 ` Andre Przywara
2022-12-20 6:48 ` Icenowy Zheng
2022-12-23 14:09 ` Sasha Levin
2022-12-17 0:09 ` [PATCH AUTOSEL 6.1 9/9] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes Sasha Levin
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