From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Amit Kucheria <amitk@kernel.org>,
Thara Gopinath <thara.gopinath@gmail.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>
Cc: "Bryan O'Donoghue" <bryan.odonoghue@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v4 18/20] arm64: dts: qcom: qcs404: specify per-sensor calibration cells
Date: Wed, 21 Dec 2022 04:05:18 +0200 [thread overview]
Message-ID: <20221221020520.1326964-19-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221221020520.1326964-1-dmitry.baryshkov@linaro.org>
Specify pre-parsed per-sensor calibration nvmem cells in the tsens
device node rather than parsing the whole data blob in the driver.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 145 ++++++++++++++++++++++++++-
1 file changed, 140 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index a5324eecb50a..84ff9df2b904 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -366,13 +366,126 @@ qfprom: qfprom@a4000 {
reg = <0x000a4000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
- tsens_caldata: caldata@d0 {
- reg = <0x1f8 0x14>;
- };
cpr_efuse_speedbin: speedbin@13c {
reg = <0x13c 0x4>;
bits = <2 3>;
};
+
+ tsens_s0_p1: s0-p1@1f8 {
+ reg = <0x1f8 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s0_p2: s0-p2@1f8 {
+ reg = <0x1f8 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_s1_p1: s1-p1@1f9 {
+ reg = <0x1f9 0x2>;
+ bits = <4 6>;
+ };
+
+ tsens_s1_p2: s1-p2@1fa {
+ reg = <0x1fa 0x1>;
+ bits = <2 6>;
+ };
+
+ tsens_s2_p1: s2-p1@1fb {
+ reg = <0x1fb 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s2_p2: s2-p2@1fb {
+ reg = <0x1fb 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_s3_p1: s3-p1@1fc {
+ reg = <0x1fc 0x2>;
+ bits = <4 6>;
+ };
+
+ tsens_s3_p2: s3-p2@1fd {
+ reg = <0x1fd 0x1>;
+ bits = <2 6>;
+ };
+
+ tsens_s4_p1: s4-p1@1fe {
+ reg = <0x1fe 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s4_p2: s4-p2@1fe {
+ reg = <0x1fe 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_s5_p1: s5-p1@200 {
+ reg = <0x200 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s5_p2: s5-p2@200 {
+ reg = <0x200 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_s6_p1: s6-p1@201 {
+ reg = <0x201 0x2>;
+ bits = <4 6>;
+ };
+
+ tsens_s6_p2: s6-p2@202 {
+ reg = <0x202 0x1>;
+ bits = <2 6>;
+ };
+
+ tsens_s7_p1: s7-p1@203 {
+ reg = <0x203 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s7_p2: s7-p2@203 {
+ reg = <0x203 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_s8_p1: s8-p1@204 {
+ reg = <0x204 0x2>;
+ bits = <4 6>;
+ };
+
+ tsens_s8_p2: s8-p2@205 {
+ reg = <0x205 0x1>;
+ bits = <2 6>;
+ };
+
+ tsens_s9_p1: s9-p1@206 {
+ reg = <0x206 0x1>;
+ bits = <0 6>;
+ };
+
+ tsens_s9_p2: s9-p2@206 {
+ reg = <0x206 0x2>;
+ bits = <6 6>;
+ };
+
+ tsens_mode: mode@208 {
+ reg = <0x208 1>;
+ bits = <0 3>;
+ };
+
+ tsens_base1: base1@208 {
+ reg = <0x208 2>;
+ bits = <3 8>;
+ };
+
+ tsens_base2: base2@208 {
+ reg = <0x209 2>;
+ bits = <3 8>;
+ };
+
cpr_efuse_quot_offset1: qoffset1@231 {
reg = <0x231 0x4>;
bits = <4 7>;
@@ -447,8 +560,30 @@ tsens: thermal-sensor@4a9000 {
compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
reg = <0x004a9000 0x1000>, /* TM */
<0x004a8000 0x1000>; /* SROT */
- nvmem-cells = <&tsens_caldata>;
- nvmem-cell-names = "calib";
+ nvmem-cells = <&tsens_mode>,
+ <&tsens_base1>, <&tsens_base2>,
+ <&tsens_s0_p1>, <&tsens_s0_p2>,
+ <&tsens_s1_p1>, <&tsens_s1_p2>,
+ <&tsens_s2_p1>, <&tsens_s2_p2>,
+ <&tsens_s3_p1>, <&tsens_s3_p2>,
+ <&tsens_s4_p1>, <&tsens_s4_p2>,
+ <&tsens_s5_p1>, <&tsens_s5_p2>,
+ <&tsens_s6_p1>, <&tsens_s6_p2>,
+ <&tsens_s7_p1>, <&tsens_s7_p2>,
+ <&tsens_s8_p1>, <&tsens_s8_p2>,
+ <&tsens_s9_p1>, <&tsens_s9_p2>;
+ nvmem-cell-names = "mode",
+ "base1", "base2",
+ "s0_p1", "s0_p2",
+ "s1_p1", "s1_p2",
+ "s2_p1", "s2_p2",
+ "s3_p1", "s3_p2",
+ "s4_p1", "s4_p2",
+ "s5_p1", "s5_p2",
+ "s6_p1", "s6_p2",
+ "s7_p1", "s7_p2",
+ "s8_p1", "s8_p2",
+ "s9_p1", "s9_p2";
#qcom,sensors = <10>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
--
2.35.1
next prev parent reply other threads:[~2022-12-21 2:05 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 2:05 [PATCH v4 00/15] thermal/drivers/tsens: specify nvmem cells in DT rather than parsing them manually Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 01/20] dt-bindings: thermal: tsens: add msm8956 compat Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 02/20] dt-bindings: thermal: tsens: support per-sensor calibration cells Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 03/20] dt-bindings: thermal: tsens: add per-sensor cells for msm8974 Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 04/20] thermal/drivers/tsens: Drop unnecessary hw_ids Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 05/20] thermal/drivers/tsens: Drop msm8976-specific defines Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 06/20] thermal/drivers/tsens: Sort out msm8976 vs msm8956 data Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 07/20] thermal/drivers/tsens: limit num_sensors to 9 Dmitry Baryshkov
2022-12-21 15:45 ` Daniel Lezcano
2022-12-21 18:05 ` Dmitry Baryshkov
2022-12-21 18:15 ` Daniel Lezcano
2022-12-21 19:42 ` Dmitry Baryshkov
2022-12-21 20:13 ` Konrad Dybcio
2022-12-21 2:05 ` [PATCH v4 08/20] thermal/drivers/tsens: fix slope values for msm8939 Dmitry Baryshkov
2022-12-21 20:14 ` Konrad Dybcio
2022-12-21 2:05 ` [PATCH v4 09/20] thermal/drivers/tsens: Support using nvmem cells for calibration data Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 10/20] thermal/drivers/tsens: Support using nvmem cells for msm8974 calibration Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 11/20] thermal/drivers/tsens: Rework legacy calibration data parsers Dmitry Baryshkov
2022-12-21 14:08 ` kernel test robot
2022-12-21 2:05 ` [PATCH v4 12/20] thermal/drivers/tsens: Drop single-cell code for mdm9607 Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 13/20] thermal/drivers/tsens: Drop single-cell code for msm8939 Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 14/20] thermal/drivers/tsens: Drop single-cell code for msm8976/msm8956 Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 15/20] arm64: dts: qcom: msm8956: use SoC-specific compat for tsens Dmitry Baryshkov
2022-12-21 20:15 ` Konrad Dybcio
2022-12-21 2:05 ` [PATCH v4 16/20] arm64: dts: qcom: msm8916: specify per-sensor calibration cells Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 17/20] arm64: dts: qcom: msm8976: " Dmitry Baryshkov
2022-12-21 2:05 ` Dmitry Baryshkov [this message]
2022-12-21 2:05 ` [PATCH v4 19/20] ARM: dts: qcom-msm8974: " Dmitry Baryshkov
2022-12-21 2:05 ` [PATCH v4 20/20] ARM: dts: qcom-apq8084: " Dmitry Baryshkov
2022-12-21 15:37 ` [PATCH v4 00/15] thermal/drivers/tsens: specify nvmem cells in DT rather than parsing them manually Daniel Lezcano
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