From: Bjorn Andersson <andersson@kernel.org>
To: Robert Marko <robimarko@gmail.com>
Cc: agross@kernel.org, konrad.dybcio@linaro.org, bhelgaas@google.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mani@kernel.org, lpieralisi@kernel.org, kw@linux.com,
svarbanov@mm-sol.com, shawn.guo@linaro.org,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/9] arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY
Date: Tue, 27 Dec 2022 13:20:49 -0600 [thread overview]
Message-ID: <20221227192049.zk5gqhpnq2m7baqa@builder.lan> (raw)
In-Reply-To: <CAOX2RU5C6uYKS4Hc7NBwnzRju1=gzewrEHudMksUAL1XdKcfCQ@mail.gmail.com>
On Tue, Dec 06, 2022 at 10:51:40AM +0100, Robert Marko wrote:
> On Mon, 5 Dec 2022 at 22:52, Bjorn Andersson <andersson@kernel.org> wrote:
> >
> > On Wed, Nov 16, 2022 at 10:48:34PM +0100, Robert Marko wrote:
> > > IPQ8074 comes in 2 silicon versions:
> > > * v1 with 2x Gen2 PCIe ports and QMP PHY-s
> > > * v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s
> > >
> > > v2 is the final and production version that is actually supported by the
> > > kernel, however it looks like PCIe related nodes were added for the v1 SoC.
> > >
> > > Now that we have Gen3 QMP PHY support, we can start fixing the PCIe support
> > > by fixing the Gen3 QMP PHY node first.
> > >
> > > Change the compatible to the Gen3 QMP PHY, correct the register space start
> > > and size, add the missing misc PCS register space.
> > >
> >
> > Does this imply that the current node doesn't actually work?
>
> Hi Bjorn,
> Yes, the node is for a completely different PHY generation, basically
> PCIe on IPQ8074
> is completely broken, hence this patch series.
>
> >
> > If that's the case, could we perhaps adopt Johan Hovolds' new binding
> > and drop the subnode in favor of just a flat reg covering the whole
> > QMP region?
>
> I have not seen that so far, any examples?
>
See
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml in
v6.2-rc1.
The idea is to, at least, use this for all new platforms introduced.
And if the current definition doesn't actually work I suggest that we
replace it with the new one.
Regards,
Bjorn
next prev parent reply other threads:[~2022-12-27 19:21 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 21:48 [PATCH 1/9] arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY Robert Marko
2022-11-16 21:48 ` [PATCH 2/9] arm64: dts: qcom: ipq8074: fix Gen3 " Robert Marko
2022-12-05 21:52 ` Bjorn Andersson
2022-12-06 9:51 ` Robert Marko
2022-12-27 19:20 ` Bjorn Andersson [this message]
2022-12-28 11:10 ` Robert Marko
2022-12-29 17:29 ` Bjorn Andersson
2023-01-03 20:31 ` Robert Marko
2022-11-16 21:48 ` [PATCH 3/9] arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges Robert Marko
2022-11-16 21:48 ` [PATCH 4/9] arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed Robert Marko
2022-11-16 21:48 ` [PATCH 5/9] dt-bindings: PCI: qcom: alphabetically sort compatibles Robert Marko
2022-11-17 13:16 ` Krzysztof Kozlowski
2023-01-15 4:29 ` Manivannan Sadhasivam
2022-11-16 21:48 ` [PATCH 6/9] dt-bindings: PCI: qcom: document IPQ8074 Gen3 port Robert Marko
2022-11-17 14:39 ` Krzysztof Kozlowski
2023-01-15 4:28 ` Manivannan Sadhasivam
2022-11-16 21:48 ` [PATCH 7/9] PCI: qcom: add support for " Robert Marko
2022-11-17 19:28 ` Bjorn Helgaas
2023-01-13 13:33 ` Lorenzo Pieralisi
2023-01-13 16:41 ` Robert Marko
2023-01-15 4:30 ` Manivannan Sadhasivam
2022-11-16 21:48 ` [PATCH 8/9] arm64: dts: qcom: ipq8074: fix Gen3 PCIe node Robert Marko
2022-11-16 21:48 ` [PATCH 9/9] arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names Robert Marko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221227192049.zk5gqhpnq2m7baqa@builder.lan \
--to=andersson@kernel.org \
--cc=agross@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh+dt@kernel.org \
--cc=robimarko@gmail.com \
--cc=shawn.guo@linaro.org \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).