From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v2 13/16] clk: qcom: gcc-sm8150: get rid of test clock
Date: Wed, 28 Dec 2022 20:52:34 +0200 [thread overview]
Message-ID: <20221228185237.3111988-14-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org>
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sm8150.c | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 09cf827addab..70b067f3618c 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -26,7 +26,6 @@
enum {
P_BI_TCXO,
P_AUD_REF_CLK,
- P_CORE_BI_PLL_TEST_SE,
P_GPLL0_OUT_EVEN,
P_GPLL0_OUT_MAIN,
P_GPLL7_OUT_MAIN,
@@ -117,14 +116,12 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_0[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_1[] = {
@@ -132,7 +129,6 @@ static const struct parent_map gcc_parent_map_1[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_1[] = {
@@ -140,41 +136,34 @@ static const struct clk_parent_data gcc_parents_1[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
{ P_BI_TCXO, 0 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_2[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_3[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
- { .fw_name = "core_bi_pll_test_se"},
};
static const struct parent_map gcc_parent_map_4[] = {
{ P_BI_TCXO, 0 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_4[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_5[] = {
@@ -182,7 +171,6 @@ static const struct parent_map gcc_parent_map_5[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL7_OUT_MAIN, 3 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_5[] = {
@@ -190,7 +178,6 @@ static const struct clk_parent_data gcc_parents_5[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll7.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_6[] = {
@@ -198,7 +185,6 @@ static const struct parent_map gcc_parent_map_6[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL9_OUT_MAIN, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_6[] = {
@@ -206,7 +192,6 @@ static const struct clk_parent_data gcc_parents_6[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll9.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_7[] = {
@@ -214,7 +199,6 @@ static const struct parent_map gcc_parent_map_7[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_AUD_REF_CLK, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_7[] = {
@@ -222,7 +206,6 @@ static const struct clk_parent_data gcc_parents_7[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "aud_ref_clk", .name = "aud_ref_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = {
--
2.39.0
next prev parent reply other threads:[~2022-12-28 18:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
2023-01-08 18:41 ` Rob Herring
2023-01-08 22:17 ` Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: " Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: " Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: " Dmitry Baryshkov
2023-01-08 18:44 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: " Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: " Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of " Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 09/16] clk: qcom: gcc-msm8998: " Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 10/16] clk: qcom: gcc-sc7180: " Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` Dmitry Baryshkov [this message]
2023-01-13 0:35 ` [PATCH v2 13/16] clk: qcom: gcc-sm8150: " Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 14/16] clk: qcom: gcc-sm8350: " Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 15/16] clk: qcom: mmcc-msm8998: " Dmitry Baryshkov
2023-01-13 0:36 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 16/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-01-11 5:09 ` (subset) [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Bjorn Andersson
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