From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v2 0/4] drm/msm/mdss: enable access to hw_rev from MDSS driver
Date: Mon, 9 Jan 2023 02:52:05 +0200 [thread overview]
Message-ID: <20230109005209.247356-1-dmitry.baryshkov@linaro.org> (raw)
On newer platforms mdss can read hw_rev register. On older platforms the
mdss driver can not read hw_rev register (to determine the platform).
Add optional 'core' clock that enables access to MDSS registers before
MDP5/DPU device is bound (and enabled the core clock).
Dmitry Baryshkov (4):
dt-bindings: display/msm: add core clock to the mdss bindings
drm/msm/mdss: enable optional core clock for MDP5 MDSS
drm/msm/mdss: check for core clk before accessing HW_REV
drm/msm/mdss: move is_mdp5 condition to msm_mdss_init
.../bindings/display/msm/qcom,mdss.yaml | 34 ++++++++++++++-----
drivers/gpu/drm/msm/msm_mdss.c | 31 ++++++++++++-----
2 files changed, 48 insertions(+), 17 deletions(-)
--
2.39.0
next reply other threads:[~2023-01-09 0:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-09 0:52 Dmitry Baryshkov [this message]
2023-01-09 0:52 ` [PATCH v2 1/4] dt-bindings: display/msm: add core clock to the mdss bindings Dmitry Baryshkov
2023-01-09 10:35 ` Krzysztof Kozlowski
2023-01-09 10:51 ` Dmitry Baryshkov
2023-01-09 11:20 ` Krzysztof Kozlowski
2023-01-09 12:06 ` Dmitry Baryshkov
2023-01-09 12:28 ` Dmitry Baryshkov
2023-01-09 14:30 ` Rob Herring
2023-01-09 0:52 ` [PATCH v2 2/4] drm/msm/mdss: enable optional core clock for MDP5 MDSS Dmitry Baryshkov
2023-01-09 0:52 ` [PATCH v2 3/4] drm/msm/mdss: check for core clk before accessing HW_REV Dmitry Baryshkov
2023-01-09 0:52 ` [PATCH v2 4/4] drm/msm/mdss: move is_mdp5 condition to msm_mdss_init Dmitry Baryshkov
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