From: Guru Das Srinagesh <quic_gurus@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: Sibi Sankar <quic_sibis@quicinc.com>,
<krzysztof.kozlowski+dt@linaro.org>, <agross@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
<konrad.dybcio@somainline.org>, <robimarko@gmail.com>,
<quic_rjendra@quicinc.com>
Subject: Re: [PATCH V6 2/2] firmware: qcom: scm: Add wait-queue handling logic
Date: Mon, 9 Jan 2023 23:56:28 -0800 [thread overview]
Message-ID: <20230110075628.GA2082@quicinc.com> (raw)
In-Reply-To: <20221208221125.bflo7unhcrgfsgbr@builder.lan>
On Dec 08 2022 16:11, Bjorn Andersson wrote:
> On Thu, Dec 08, 2022 at 12:10:31PM +0530, Sibi Sankar wrote:
...
> > +
> > + err = idr_alloc_u32(&scm->waitq.idr, wq, &wq_ctx_idr,
> > + U32_MAX, GFP_ATOMIC);
>
> PS. Thinking about it further, imagine the firmware people deciding to
> be funny and allocating the wq_ctx in a cyclic fashion. The idr will
> consume all your ram after a while...
Even if wq_ctx is allocated cyclically, say, from 1 to N, only N idrs would
ever be allocated as subsequently there would only be lookups. Could you
elaborate on how we would run out of RAM?
Thank you.
Guru Das.
prev parent reply other threads:[~2023-01-10 7:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-08 6:40 [PATCH V6 0/2] SCM: Add support for wait-queue aware firmware Sibi Sankar
2022-12-08 6:40 ` [PATCH V6 1/2] dt-bindings: firmware: qcom,scm: Add optional interrupt Sibi Sankar
2022-12-08 7:59 ` Krzysztof Kozlowski
2022-12-08 6:40 ` [PATCH V6 2/2] firmware: qcom: scm: Add wait-queue handling logic Sibi Sankar
2022-12-08 22:11 ` Bjorn Andersson
2023-01-10 7:56 ` Guru Das Srinagesh [this message]
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