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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: [PATCH 04/13] clk: qcom: cpu-8996: support using GPLL0 as SMUX input
Date: Wed, 11 Jan 2023 22:19:55 +0300	[thread overview]
Message-ID: <20230111192004.2509750-5-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230111192004.2509750-1-dmitry.baryshkov@linaro.org>

In some cases the driver might need using GPLL0 to drive CPU clocks.
Bring it in through the sys_apcs_aux clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/clk-cpu-8996.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index d51965fda56d..0e0c00d44c6f 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -12,6 +12,8 @@
  *                              +-------+
  *               XO             |       |
  *           +------------------>0      |
+ *               SYS_APCS_AUX   |       |
+ *           +------------------>3      |
  *                              |       |
  *                    PLL/2     | SMUX  +----+
  *                      +------->1      |    |
@@ -310,20 +312,29 @@ static const struct clk_ops clk_cpu_8996_pmux_ops = {
 	.determine_rate = clk_cpu_8996_pmux_determine_rate,
 };
 
+static const struct parent_map smux_parent_map[] = {
+	{ .cfg = 0, }, /* xo */
+	{ .cfg = 1, }, /* pll */
+	{ .cfg = 3, }, /* sys_apcs_aux */
+};
+
 static const struct clk_parent_data pwrcl_smux_parents[] = {
 	{ .fw_name = "xo" },
 	{ .hw = &pwrcl_pll_postdiv.hw },
+	{ .fw_name = "sys_apcs_aux" },
 };
 
 static const struct clk_parent_data perfcl_smux_parents[] = {
 	{ .fw_name = "xo" },
 	{ .hw = &perfcl_pll_postdiv.hw },
+	{ .fw_name = "sys_apcs_aux" },
 };
 
 static struct clk_regmap_mux pwrcl_smux = {
 	.reg = PWRCL_REG_OFFSET + MUX_OFFSET,
 	.shift = 2,
 	.width = 2,
+	.parent_map = smux_parent_map,
 	.clkr.hw.init = &(struct clk_init_data) {
 		.name = "pwrcl_smux",
 		.parent_data = pwrcl_smux_parents,
@@ -337,6 +348,7 @@ static struct clk_regmap_mux perfcl_smux = {
 	.reg = PERFCL_REG_OFFSET + MUX_OFFSET,
 	.shift = 2,
 	.width = 2,
+	.parent_map = smux_parent_map,
 	.clkr.hw.init = &(struct clk_init_data) {
 		.name = "perfcl_smux",
 		.parent_data = perfcl_smux_parents,
-- 
2.30.2


  parent reply	other threads:[~2023-01-11 19:20 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-11 19:19 [PATCH 00/13] clk: qcom: cpu-8996: stability fixes Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 01/13] clk: qcom: clk-alpha-pll: program PLL_TEST/PLL_TEST_U if required Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 02/13] clk: qcom: cpu-8996: correct PLL programming Dmitry Baryshkov
2023-01-11 20:57   ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 03/13] clk: qcom: cpu-8996: fix the init clock rate Dmitry Baryshkov
2023-01-11 20:58   ` Konrad Dybcio
2023-01-11 21:51     ` Dmitry Baryshkov
2023-01-12 12:12       ` Konrad Dybcio
2023-01-11 19:19 ` Dmitry Baryshkov [this message]
2023-01-11 19:26   ` [PATCH 04/13] clk: qcom: cpu-8996: support using GPLL0 as SMUX input Stephen Boyd
2023-01-11 20:00     ` Dmitry Baryshkov
2023-01-11 20:59   ` Konrad Dybcio
2023-01-11 21:52     ` Dmitry Baryshkov
2023-01-12 12:16       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 05/13] clk: qcom: cpu-8996: skip ACD init if the setup is valid Dmitry Baryshkov
2023-01-11 21:00   ` Konrad Dybcio
2023-01-11 21:55     ` Dmitry Baryshkov
2023-01-12 12:17       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 06/13] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb Dmitry Baryshkov
2023-01-11 21:03   ` Konrad Dybcio
2023-01-11 22:01     ` Dmitry Baryshkov
2023-01-12 14:13       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 07/13] clk: qcom: cpu-8996: setup PLLs before registering clocks Dmitry Baryshkov
2023-01-11 21:04   ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 08/13] clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call Dmitry Baryshkov
2023-01-12 14:26   ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 09/13] clk: qcom: cpu-8996: fix PLL configuration sequence Dmitry Baryshkov
2023-01-11 21:08   ` Konrad Dybcio
2023-01-11 22:05     ` Dmitry Baryshkov
2023-01-12 14:32       ` Konrad Dybcio
2023-01-13 11:19         ` Dmitry Baryshkov
2023-01-13 13:43           ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 10/13] clk: qcom: cpu-8996: fix ACD initialization Dmitry Baryshkov
2023-01-12 14:35   ` Konrad Dybcio
2023-01-13 10:44     ` Dmitry Baryshkov
2023-01-13 14:00       ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 11/13] clk: qcom: cpu-8996: fix PLL clock ops Dmitry Baryshkov
2023-01-12 16:10   ` Konrad Dybcio
2023-01-13 11:35     ` Dmitry Baryshkov
2023-01-13 14:02       ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 12/13] clk: qcom: cpu-8996: change setup sequence to follow vendor kernel Dmitry Baryshkov
2023-01-12 14:42   ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 13/13] arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input Dmitry Baryshkov

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