From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH 06/13] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb
Date: Wed, 11 Jan 2023 22:19:57 +0300 [thread overview]
Message-ID: <20230111192004.2509750-7-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230111192004.2509750-1-dmitry.baryshkov@linaro.org>
- Do not use the Alt PLL completely. Switch to smux when necessary to
prevent overvolting
- Restore the parent in case the rate change aborts for some reason
- Do not duplicate resetting the parent in set_parent operation.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/clk-cpu-8996.c | 31 +++++++++++++++++++------------
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 7e5246ca7e7f..ee7e18b37832 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -506,27 +506,34 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
{
struct clk_cpu_8996_pmux *cpuclk = to_clk_cpu_8996_pmux_nb(nb);
struct clk_notifier_data *cnd = data;
- int ret;
switch (event) {
case PRE_RATE_CHANGE:
- ret = clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, ALT_INDEX);
qcom_cpu_clk_msm8996_acd_init(base);
+
+ /*
+ * Avoid overvolting. clk_core_set_rate_nolock() walks from top
+ * to bottom, so it will change the rate of the PLL before
+ * chaging the parent of PMUX. This can result in pmux getting
+ * clocked twice the expected rate.
+ *
+ * Manually switch to PLL/2 here.
+ */
+ if (cnd->new_rate < DIV_2_THRESHOLD &&
+ cnd->old_rate > DIV_2_THRESHOLD)
+ clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, SMUX_INDEX);
+
break;
- case POST_RATE_CHANGE:
- if (cnd->new_rate < DIV_2_THRESHOLD)
- ret = clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw,
- SMUX_INDEX);
- else
- ret = clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw,
- ACD_INDEX);
- break;
+ case ABORT_RATE_CHANGE:
+ /* Revert manual change */
+ if (cnd->new_rate < DIV_2_THRESHOLD &&
+ cnd->old_rate > DIV_2_THRESHOLD)
+ clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, ACD_INDEX);
default:
- ret = 0;
break;
}
- return notifier_from_errno(ret);
+ return NOTIFY_OK;
};
static int qcom_cpu_clk_msm8996_driver_probe(struct platform_device *pdev)
--
2.30.2
next prev parent reply other threads:[~2023-01-11 19:20 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 19:19 [PATCH 00/13] clk: qcom: cpu-8996: stability fixes Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 01/13] clk: qcom: clk-alpha-pll: program PLL_TEST/PLL_TEST_U if required Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 02/13] clk: qcom: cpu-8996: correct PLL programming Dmitry Baryshkov
2023-01-11 20:57 ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 03/13] clk: qcom: cpu-8996: fix the init clock rate Dmitry Baryshkov
2023-01-11 20:58 ` Konrad Dybcio
2023-01-11 21:51 ` Dmitry Baryshkov
2023-01-12 12:12 ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 04/13] clk: qcom: cpu-8996: support using GPLL0 as SMUX input Dmitry Baryshkov
2023-01-11 19:26 ` Stephen Boyd
2023-01-11 20:00 ` Dmitry Baryshkov
2023-01-11 20:59 ` Konrad Dybcio
2023-01-11 21:52 ` Dmitry Baryshkov
2023-01-12 12:16 ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 05/13] clk: qcom: cpu-8996: skip ACD init if the setup is valid Dmitry Baryshkov
2023-01-11 21:00 ` Konrad Dybcio
2023-01-11 21:55 ` Dmitry Baryshkov
2023-01-12 12:17 ` Konrad Dybcio
2023-01-11 19:19 ` Dmitry Baryshkov [this message]
2023-01-11 21:03 ` [PATCH 06/13] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb Konrad Dybcio
2023-01-11 22:01 ` Dmitry Baryshkov
2023-01-12 14:13 ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 07/13] clk: qcom: cpu-8996: setup PLLs before registering clocks Dmitry Baryshkov
2023-01-11 21:04 ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 08/13] clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call Dmitry Baryshkov
2023-01-12 14:26 ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 09/13] clk: qcom: cpu-8996: fix PLL configuration sequence Dmitry Baryshkov
2023-01-11 21:08 ` Konrad Dybcio
2023-01-11 22:05 ` Dmitry Baryshkov
2023-01-12 14:32 ` Konrad Dybcio
2023-01-13 11:19 ` Dmitry Baryshkov
2023-01-13 13:43 ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 10/13] clk: qcom: cpu-8996: fix ACD initialization Dmitry Baryshkov
2023-01-12 14:35 ` Konrad Dybcio
2023-01-13 10:44 ` Dmitry Baryshkov
2023-01-13 14:00 ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 11/13] clk: qcom: cpu-8996: fix PLL clock ops Dmitry Baryshkov
2023-01-12 16:10 ` Konrad Dybcio
2023-01-13 11:35 ` Dmitry Baryshkov
2023-01-13 14:02 ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 12/13] clk: qcom: cpu-8996: change setup sequence to follow vendor kernel Dmitry Baryshkov
2023-01-12 14:42 ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 13/13] arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input Dmitry Baryshkov
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