[PATCH v2 00/14] clk: qcom: cpu-8996: stability fixes

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

This series provides stability fixes for the MSM8996 boot process. It
changes the order of calls during the CPU PLL setup, makes it use GPLL0
(through sys_apcs_aux) during PLL init, finetunes the ACD, etc.

Dependencies: [1], [2]

[1] https://lore.kernel.org/linux-arm-msm/20230111191453.2509468-1-dmitry.baryshkov@linaro.org/
[2] https://lore.kernel.org/linux-arm-msm/20230111191634.2509616-1-dmitry.baryshkov@linaro.org/

Changes since v1:
 - Included bindings update

Dmitry Baryshkov (14):
  dt-bindings: clock: qcom,msm8996-apcc: add sys_apcs_aux clock
  clk: qcom: clk-alpha-pll: program PLL_TEST/PLL_TEST_U if required
  clk: qcom: cpu-8996: correct PLL programming
  clk: qcom: cpu-8996: fix the init clock rate
  clk: qcom: cpu-8996: support using GPLL0 as SMUX input
  clk: qcom: cpu-8996: skip ACD init if the setup is valid
  clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb
  clk: qcom: cpu-8996: setup PLLs before registering clocks
  clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call
  clk: qcom: cpu-8996: fix PLL configuration sequence
  clk: qcom: cpu-8996: fix ACD initialization
  clk: qcom: cpu-8996: fix PLL clock ops
  clk: qcom: cpu-8996: change setup sequence to follow vendor kernel
  arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input

 .../bindings/clock/qcom,msm8996-apcc.yaml     |   6 +-
 arch/arm64/boot/dts/qcom/msm8996.dtsi         |   4 +-
 drivers/clk/qcom/clk-alpha-pll.c              |   5 +
 drivers/clk/qcom/clk-cpu-8996.c               | 145 +++++++++++++-----
 4 files changed, 115 insertions(+), 45 deletions(-)

-- 
2.30.2