From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9642CC54EBE for ; Mon, 16 Jan 2023 08:00:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232119AbjAPIAE (ORCPT ); Mon, 16 Jan 2023 03:00:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232101AbjAPH77 (ORCPT ); Mon, 16 Jan 2023 02:59:59 -0500 X-Greylist: delayed 903 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Sun, 15 Jan 2023 23:59:11 PST Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1244412050; Sun, 15 Jan 2023 23:59:10 -0800 (PST) Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Mon, 16 Jan 2023 15:44:04 +0800 From: Yu Tu To: , , , , , Rob Herring , "Neil Armstrong" , Jerome Brunet , Kevin Hilman , Michael Turquette , Stephen Boyd , "Krzysztof Kozlowski" , Martin Blumenstingl CC: "kelvin . zhang" , "qi . duan" , Yu Tu Subject: [PATCH V6 0/3] Add S4 SoC PLL and Peripheral clock controller Date: Mon, 16 Jan 2023 15:42:11 +0800 Message-ID: <20230116074214.2326-1-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Add S4 SoC PLL and Peripheral clock controller dt-bindings. 2. Add PLL and Peripheral clock controller driver for S4 SOC. Yu Tu (3): dt-bindings: clock: document Amlogic S4 SoC PLL & peripheral clock controller clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver clk: meson: s4: add support for Amlogic S4 SoC peripheral clock controller V5 -> V6: Change send patch series, as well change format and clock flags. V4 -> V5: change format and clock flags and adjust the patch series as suggested by Jerome. V3 -> V4: change format and clock flags. V2 -> V3: Use two clock controller. V1 -> V2: Change format as discussed in the email. Link:https://lore.kernel.org/all/20221123021346.18136-1-yu.tu@amlogic.com/ .../clock/amlogic,s4-peripherals-clkc.yaml | 104 + .../bindings/clock/amlogic,s4-pll-clkc.yaml | 50 + MAINTAINERS | 1 + drivers/clk/meson/Kconfig | 25 + drivers/clk/meson/Makefile | 2 + drivers/clk/meson/s4-peripherals.c | 3874 +++++++++++++++++ drivers/clk/meson/s4-peripherals.h | 218 + drivers/clk/meson/s4-pll.c | 875 ++++ drivers/clk/meson/s4-pll.h | 88 + .../clock/amlogic,s4-peripherals-clkc.h | 131 + .../dt-bindings/clock/amlogic,s4-pll-clkc.h | 30 + 11 files changed, 5398 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-peripherals-clkc.yaml create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml create mode 100644 drivers/clk/meson/s4-peripherals.c create mode 100644 drivers/clk/meson/s4-peripherals.h create mode 100644 drivers/clk/meson/s4-pll.c create mode 100644 drivers/clk/meson/s4-pll.h create mode 100644 include/dt-bindings/clock/amlogic,s4-peripherals-clkc.h create mode 100644 include/dt-bindings/clock/amlogic,s4-pll-clkc.h base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2 -- 2.33.1