From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Lars-Peter Clausen <lars@metafoo.de>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3] clk: vc5: Add support for 5P49V60
Date: Mon, 16 Jan 2023 09:15:25 +0100 [thread overview]
Message-ID: <20230116091525.43bcd655@booty> (raw)
In-Reply-To: <20230114233500.3294789-2-lars@metafoo.de>
On Sat, 14 Jan 2023 15:34:59 -0800
Lars-Peter Clausen <lars@metafoo.de> wrote:
> The 5P49V60 is very similar to the existing supported clock chips of the
> versaclock5 driver and uses the same register map layout. But its maximum
> VCO frequency is 2.7 GHz instead of 3 GHz for the other supported devices.
>
> Add a vco_max field to the chip info field to allow to specify a per device
> variant maximum VCO frequency.
>
> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2023-01-16 8:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-14 23:34 [PATCH 1/3] clk: vc5: Use `clamp()` to restrict PLL range Lars-Peter Clausen
2023-01-14 23:34 ` [PATCH 2/3] clk: vc5: Add support for 5P49V60 Lars-Peter Clausen
2023-01-16 8:15 ` Luca Ceresoli [this message]
2023-01-18 18:57 ` Stephen Boyd
2023-01-14 23:35 ` [PATCH 3/3] dt-bindings: clock: versaclock5: Document 5P49V60 compatible string Lars-Peter Clausen
2023-01-15 14:55 ` Krzysztof Kozlowski
2023-01-16 8:15 ` Luca Ceresoli
2023-01-18 18:57 ` Stephen Boyd
2023-01-16 8:15 ` [PATCH 1/3] clk: vc5: Use `clamp()` to restrict PLL range Luca Ceresoli
2023-01-18 18:57 ` Stephen Boyd
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